Šišejković, D., Merchant, F., Leupers, R., Ascheid, G. and Kegreiss, S.: Inter-Lock: Logic Encryption for Processor Cores Beyond Module Boundaries, in 24th IEEE European Test Symposium (ETS'19), May. 2019, accepted for publication ©2019 IEEE
Šišejković, D., Merchant, F., Leupers, R., Ascheid, G. and Kegreiss, S.: Control-Lock: Securing Processor Cores Against Software-Controlled Hardware Trojans, in Great Lakes Symposium on VLSI (GLSVLSI'19), May. 2019, 10.1145/3299874.3317983 ©2019 IEEE
Bytyn, A., Leupers, R. and Ascheid, G.: An Application-Specific VLIW Processor with Vector Instruction Set for CNN Acceleration, in 2019 IEEE International Symposium on Circuits and Systems (ISCAS) , IEEE, May. 2019, ISBN: 978-1-72810-397-6, 10.1109/ISCAS.2019.8702357
Šišejković, D., Merchant, F., Leupers, R., Ascheid, G. and Kiefer, V.: A Critical Evaluation of the Paradigm Shift in the Design of Logic Encryption Algorithms, in 2019 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), Apr. 2019
Rainer Leupers received the M.Sc. (Dipl.-Inform.) and Ph.D. (Dr. rer. nat.) degrees in Computer Science with honors from TU Dortmund in 1992 and 1997. From 1997-2001 he was the Chief Engineer at the Embedded Systems chair at TU Dortmund. In 2002, he joined RWTH Aachen University as a professor for Software for Systems on Silicon. His research comprises software development tools, processor architectures, hardware security, and system-level electronic design automation, with focus on application-specific multicore systems. He published numerous books and technical papers and served in committees of the leading international EDA conferences. He received various scientific awards, including Best Paper Awards at DAC and twice at DATE, as well as several industrial awards. Dr. Leupers is also engaged as an entrepreneur and in turning research results into innovations. He holds several patents and has been a co-founder of LISATek (now with Synopsys), Silexica, and Secure Elements. He has served as consultant for various companies, as an expert for the European Commission, and in the management boards of large-scale projects, e.g. the HiPEAC network and the UMIC excellence cluster. He is the coordinator of the EU projects TETRACOM and TETRAMAX on academia/industry technology transfer.