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Alumni Assistant: Lukas Jünger

Publications

Bosbach, N., Zurstraßen, N., Pelke, R., Jünger, L., Weinstock, J. H. and Leupers, R.: Towards High-Performance Virtual Platforms: A Parallelization Strategy for SystemC TLM-2.0 CPU Models, in Design Automation Conference , Jun. 2024, accepted for publication, 10.1145/3649329.3658257
Bosbach, N., Salama, A., Jünger, L., Burton, M., Zurstraßen, N., Pelke, R. and Leupers, R.: NQC²: A Non-Intrusive QEMU Code Coverage Plugin, in Rapid Simulation and Performance Evaluation for Design (RAPIDO '24), January 18, 2024, Munich, Germany ( New York, NY, USA), Association for Computing Machinery, Jan. 2024, ISBN: 979-8-40071-791-8, 10.1145/3642921.3642924
Zurstraßen, N., Brandhofer, R., Cubero-Cascante, J., Bosbach, N., Jünger, L. and Leupers, R.: The Optimal Quantum of Temporal Decoupling, in 29th Asia and South Pacific Design Automation Conference, 2024, 10.1109/ASP-DAC58780.2024.10473967 ©2024 IEEE
Bosbach, N., Pelke, R., Zurstraßen, N., Jünger, L., Weinstock, J. H. and Leupers, R.: Work-in-Progress: A Generic Non-Intrusive Parallelization Approach for SystemC TLM-2.0-based Virtual Platforms, in International Conference on Hardware/Software Codesign and System Synthesis , Sep. 2023, 10.1145/3607888.3608596
Bosbach, N., Jünger, L., Pelke, R., Zurstraßen, N. and Leupers, R.: Entropy-Based Analysis of Benchmarks for Instruction Set Simulators, in RAPIDO2023: Proceedings of the DroneSE and RAPIDO: System Engineering for constrained embedded systems (New York, NY, USA), pp. 54-59, Association for Computing Machinery, Jan. 2023, ISBN: 979-8-40070-045-3, 10.1145/3579170.3579267
Zurstraßen, N., Bosbach, N., Joseph, J. M., Jünger, L., Weinstock, J. H. and Leupers, R.: Efficient RISC-V-on-x64 Floating Point Simulation, in ICCD, 2023, 10.1109/ICCD58817.2023.00090 ©2023 IEEE
Zurstraßen, N., Reimann, L. M., Bosbach, N., Jünger, L. and Leupers, R.: Evaluation of the RISC-V Floating Point Extensions, in DVCon, 2023
Bosbach, N., Jünger, L., Joseph, J. M. and Leupers, R.: NISTT: A Non-Intrusive SystemC-TLM 2.0 Tracing Tool, in 2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration (VLSI-SoC) , IEEE, 2022, ISBN: 978-1-66549-006-1, ISSN: 2324-8440, 10.1109/VLSI-SoC54400.2022.9939578 ©2022 IEEE
Zurstraßen, N., Jünger, L., Kogel, T., Keding, H. and Leupers, R.: AMAIX In-Depth: A Generic Analytical Model for Deep Learning Accelerators, in International Journal of Parallel Programming, 2022, 10.1007/s10766-022-00728-3
Jünger, L., Bianco, C., Niederholtmeyer, K., Petras, D. and Leupers, R.: Optimizing Temporal Decoupling using Event Relevance, in Proceedings of the Asia South Pacific Design Automation Conference (ASP-DAC), 2021, 10.1145/3394885.3431419
Jünger, L., Bölke, J., Tobies, S., Hoffmann, A. and Leupers, R.: ARM-on-ARM: Leveraging Virtualization Extensions for Fast Virtual Platforms, in Proceedings of the Conference on Design, Automation & Test in Europe (DATE), pp. 1508-1513, 2020, 10.23919/DATE48585.2020.9116573 ©2020 IEEE
Jünger, L., Zurstraßen, N., Kogel, T., Keding, H. and Leupers, R.: AMAIX: A Generic Analytical Model for Deep Learning Accelerators, in SAMOS International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, pp. 36-51, Springer, 2020, 10.1007/978-3-030-60939-9_3
Jünger, L., Weinstock, J. H., Leupers, R. and Ascheid, G.: Fast SystemC Processor Models with Unicorn, in Proceedings of the 2019 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, Jan. 2019, 10.1145/3300189.3300191