Institute for Communication Technologies and Embedded Systems

News

New Book: 3D Interconnect Architectures for Heterogeneous Technologies

A new book with the title “3D Interconnect Architectures for Heterogeneous Technologies: Modeling and Optimization” has been published by Jan Moritz Joseph from ICE. It describes the first comprehensive approach to the optimization of interconnect architectures in 3D systems on chips (SoCs), specially addressing the challenges and opportunities arising from heterogeneous integration.…

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ICE team joined the general assembly of the German 6G Research Hub 6GEM

From 29/06/2022 to 30/06/2022 ICE team joined the general assembly of the German 6G Research Hub 6GEM (https://www.6gem.de/en/) . We discussed in poster and synergy sessions about 6G testfields, intelligent reconfigurable surfaces, 6G THz, and many other 6G related topics. 

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Press release: Aachen-based start-up MachineWare enables ultra-fast RISC-V simulation

Startup MachineWare is set to revolutionise semiconductor design with its high-speed RISC-V simulator SIM-V.

SIM-V Compute aims to design and verify high-performance RISC-V systems, including hardware models of GPUs and high-speed PCIe interconnects.
SIM-V Edge, at the other end of the spectrum, is optimised for designing compact 32-bit edge computing systems and offers a wide range…

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ICE organized the 4th version of hardware security workshop at HiPEAC 2022

For the fourth time in a row, ICE organized the Workshop on Secure Hardware, Architectures, and Operating Systems (SeHAS) at the HiPEAC (https://www.hipeac.net/2022/budapest/#/) conference - this time in Budapest. 

The agenda was packed with top-notch talks in the domain of security, ranging from the application of formal methods to ensure secure hardware implementations down to…

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Jülich-Aachen Neuromorphic Computing Day

at Forschungszentrum Jülich

Highlights of the Projects NEUROTEC and NeuroSys

  • Prof. Rainer Waser (Forschungszentrum Jülich, RWTH Aachen University)
    Neuro-inspired Technology of Artificial Intelligence for Future Electronics: NEUROTEC
     
  • Prof. Max Christian Lemme (RWTH Aachen University, AMO GmbH)
    Clusters4Future NeuroSys– Neuromorphic Hardware for Autonomous Systems of Artificial…

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New Spin Off MachineWare GmbH founded

MachineWare is a provider of high-speed instruction set simulators, including RISC-V full-system simulators. Its technologies enable ultra-fast software bring-up and validation before physical hardware is available. It's headquartered in Aachen, Germany.

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ICE Receives Best Paper Award at ISQED 2022

ICE researchers Dr. Melvin Galicia Cota, Dr. Farhad Merchant, and Prof. Rainer Leupers received the best paper award at International Symposium on Quality Electronic Design 2022 (ISQED 2022) for the paper entitled "A Parallel SystemC Virtual Platform for Neuromorphic Architectures." The paper presents a parallel SystemC-based virtual prototype for RISC-V multicore platforms…

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Final TETRAMAX review meeting

TETRAMAX has come to an end with the highest grading.


In its final review meeting, the TETRAMAX Innovation Action received the highest ranking from the European Commission, as also achieved for its predecessor TETRACOM. The project officer and the external reviewers have emphasized that “the project is a clear success”. It was launched in 2017 with the mission to promote…

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New TETRAMAX video

A short TETRAMAX summary video clip was produced.

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Prof. Gačanin: Invited talk at Thinknet 6G Summit

6G perspective in 6GEM Research Hub


Prof. Gačanin will give an invited talk on 6G perspective in 6GEM Research Hub at Thinknet 6G Summit on October 28th, 2021

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