Lennart Reimann received his Bachelor's and Master's degree in Electrical Engineering, Information Technology, and Computer Engineering from RWTH Aachen University in 2016 and 2019, respectively. During his Bachelor's degree, he started working as a student assistant at the Institute for Communication Technologies and Embedded Systems (ICE), which he continued through his Master's degree. His work at ICE was in the field of ASIP design for several applications, mainly in the field of Machine Learning. After his Master's, he started working toward his Ph.D. as a research assistant at ICE under the supervision of Prof. Leupers. His research interest includes Hardware Security, Secure ASIP design, Cryptographic accelerator design, etc.
QFlow: Quantifying Data Leakage for RTL IP
ICCD 2021 - QFlow: Quantitative Information Flow for Security-Aware Hardware Design in Verilog