ICE Welcomes its First AROP Fellow


The Institute for Communication Technologies and Embedded Systems (ICE) welcomes its first AROP…

Dominik Šišejković wins HiPEAC Technology Transfer Award 2020


2020 marks the sixth edition of the HiPEAC Tech Transfer Awards. This year, Dominik Šišejković

ICE along with Technion organizes 3rd Security Workshop at HiPEAC 2021


ICE and Technion have organized another successful "SeHAS: Secure Hardware, Architectures, and…

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Latest Publications

Chen, X., Liu, M., Gui, G., Abedisi, B., Gacanin, H. and Sari, H.: Complex Deep Neural Network Based Intelligent Signal Detection Methods for OFDM-IM Systems, in The 2021 Joint EuCNC & 6G Summit, 8-11 June 2021, Porto, Portugal., Jun. 2021, accepted for publication

Šišejković, D., Merchant, F., Reimann, L. M., Srivastava, H., Hallawa, A. and Leupers, R.: Challenging the Security of Logic Locking Schemes in the Era of Deep Learning: A Neuroevolutionary Approach, in ACM Journal on Emerging Technologies in Computing Systems (JETC), Vol. 17, No. 3, Association for Computing Machinery, p. 26, May. 2021, accepted for publication, ISSN: 1550-4832, 10.1145/3431389

Zeng, J., Sun, J., Gui, G., Abedisi, B., Ohtsuki, T., Gacanin, H. and Sari, H.: Downlink CSI Feedback Algorithm with Deep Transfer Learning for FDD Massive MIMO Systems, in IEEE Transactions on Cognitive Communications and Networking, May. 2021, accepted for publication, 10.1109/TCCN.2021.3084409 ©2021 IEEE

The Institute for Communication Technologies and Embedded Systems (ICE) is jointly directed by Prof. Rainer Leupers (Chair for Software for Systems on Silicon, SSS) and Prof. Haris Gačanin (Chair for Distributed Signal Processing, DSP), who collaborate closely in research and complement each other with their expertise.

Key research areas at ICE:

  • Wireless signal processing and networking for wireless communication systems: from algorithm to implementation
  • Intelligent systems and short-range communication systems (e.g. AI-based RRM, D2D, Cyber Physical Systems, M2M, Wireless 2.0)
  • Design of sensors with convergence of signal processing and machine learning methodologies
  • Efficient hardware accelerators and processor architectures for embedded applications, in particular multiprocessor systems-on-chip (MPSoC)
  • Electronic system-level (ESL) design tools for application-specific HW/SW systems
  • Software development tools (e.g. compilers and fast simulators) for heterogeneous multicore architectures
  • Hardware security


Institute for Communication Technologies and Embedded Systems

Chair for Software for Systems on Silicon
Univ.-Prof. Dr. rer. nat. Rainer Leupers
+49 241 80-28301

Chair for Distributed Signal Processing
Univ.-Prof. Dr. Haris Gačanin
+49 241 80-27880

Kopernikusstraße 16
52074 Aachen

How to find us

Bridging the Frequency Gap in Heterogeneous 3D SoCs with Technology-Specific NoCs

Architecture, Dataflow and Physical Design Implications of 3D-ICs for DNN-Accelerators