News

ICE spin-off Silexica acquired by Xilinx

Jun142021

Following comprehensive research activities within the UMIC Excellence Cluster, Silexica has been…

ICE Welcomes its First AROP Fellow

Feb022021

The Institute for Communication Technologies and Embedded Systems (ICE) welcomes its first AROP…

Dominik Šišejković wins HiPEAC Technology Transfer Award 2020

Jan292021

2020 marks the sixth edition of the HiPEAC Tech Transfer Awards. This year, Dominik Šišejković

More news

The Institute for Communication Technologies and Embedded Systems (ICE) is jointly directed by Prof. Rainer Leupers (Chair for Software for Systems on Silicon, SSS) and Prof. Haris Gačanin (Chair for Distributed Signal Processing, DSP), who collaborate closely in research and complement each other with their expertise.

Key research areas at ICE:

  • Wireless signal processing and networking for wireless communication systems: from algorithm to implementation
  • Intelligent systems and short-range communication systems (e.g. AI-based RRM, D2D, Cyber Physical Systems, M2M, Wireless 2.0)
  • Design of sensors with convergence of signal processing and machine learning methodologies
  • Efficient hardware accelerators and processor architectures for embedded applications, in particular multiprocessor systems-on-chip (MPSoC)
  • Electronic system-level (ESL) design tools for application-specific HW/SW systems
  • Software development tools (e.g. compilers and fast simulators) for heterogeneous multicore architectures
  • Hardware security

Contact

Institute for Communication Technologies and Embedded Systems

Chair for Software for Systems on Silicon
Univ.-Prof. Dr. rer. nat. Rainer Leupers
+49 241 80-28301

Chair for Distributed Signal Processing
Univ.-Prof. Dr. Haris Gačanin
+49 241 80-27880

Kopernikusstraße 16
52074 Aachen
Germany
sekretariat(at)ice.rwth-aachen.de

How to find us


NeuroVP: A System-Level Virtual Platform for Integration of Neuromorphic Accelerators

ACM Nanocom 2021 - Technology-aware Router Architectures for On-Chip-Networks

Bridging the Frequency Gap in Heterogeneous 3D SoCs with Technology-Specific NoCs

Architecture, Dataflow and Physical Design Implications of 3D-ICs for DNN-Accelerators