Telecommunication products such as networking devices, cellular phones, and modems are rapidly growing in complexity. Due to the fierce competition with an increased number of competitors in this field, time-to-market is particularly critical. Because of these reasons combined with product performance/size issues, system designers are forced to increasingly use embedded processors.
The design and implementation of an embedded processor, such as a DSP device embedded in a cellular phone, requires the following tasks or phases:
Application software design.
System integration and verification.
During the architecture exploration phase, software development tools (i.e. HLL compiler, assembler, linker, and cycle accurate simulator) are required to profile and benchmark the target application on different architecture alternatives. This process is usually an iterative one that is repeated until a best fit between selected architecture and target application is obtained. Every change to the architecture specification requires a complete new set of software development tools. As these changes on the tools are carried out mainly manually, this results in a long, tedious and extremely error-prone process. Moreover, the lack of automation makes it very difficult to match the profiling tools to an abstract specification of the target architecture.
In the architecture implementation phase, the chosen architecture design is used as the basis for synthesizing the specified processor. At this point, a hardware description language such as VHDL or Verilog is introduced. With this additional manual transformation it is quite obvious that considerable consistency problems arise between the architecture specification, the software development tools, and the hardware implementation.
During the software application design phase, software designers need a set of production-quality software development tools. Since the demands of the software application designer and the hardware processor designer place different requirements on software development tools, new tools are required. For example, the processor designer needs a cycle/phase accurate simulator for hardware/ software partitioning and profiling, which is very accurate but inevitably slow, whereas the application designer needs more simulation speed than accuracy. At this point, the complete software development tool-suite is usually re-implemented by hand - consistency problems are self-evident.
In the system integration and verification phase, the major task is to evaluate the trade-off between various functionalities (e.g. speed, size, and power consumption) to determine which part of the overall system functionality should be implemented in software and which must be implemented in hardware (hardware-software partitioning). Here, co-simulation interfaces must be developed to integrate the software simulator for the chosen architecture into a system simulation environment. These interfaces vary with the architecture that is currently under test. Again, manual modification of the interfaces is required with each change of the architecture.