Institute for Communication Technologies and Embedded Systems

VLSI Design of a Parallel MCMC-based MIMO Detector with Multiplier-Free Gibbs Samplers

Authors:
Auras, D. ,  Deidersen, U. ,  Leupers, R.Ascheid, G.
Book Title:
Proceedings of the 2014 IFIP/IEEE 22nd International Conference on Very Large Scale Integration (VLSI-SoC)
Publisher:
IEEE
Pages:
p.p. 1-6
Date:
Oct. 2014
DOI:
10.1109/VLSI-SoC.2014.7004160
Language:
English
Abstract:
Little consideration has so far been dedicated to the investigation of the implementation complexity of stochastic detectors for multi-antenna (MIMO) systems although they promise communications performance close to max-log detection for certain SNR regimes. In this work, we propose a complete redesign of the only reported parallel VLSI architecture for soft-input soft-output Markov chain Monte Carlo based MIMO detection to date. Using multiplier-free Gibbs Sampler implementations, dynamic scaling of the noise density and multiple further architectural optimizations, we significantly reduce the area and improve the timing, yielding AT-efficiency improvements of as much as 3.6 times.
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