Institute for Communication Technologies and Embedded Systems

NeuroVP: A System-Level Virtual Platform for Integration of Neuromorphic Accelerators

Authors:
Galicia, M. ,  BanaGozar, A. ,  Sturm, K. J. X. ,  Staudigl, F. ,  Stuijk, S. ,  Corporaal, H. ,  Leupers, R.
Book Title:
International Conference on Communications and Technology
Publisher:
IEEE SOCC
Date:
2021
DOI:
10.1109/SOCC52499.2021.9739585
hsb:
RWTH-2022-05248
Language:
English
Abstract:
Executing neural network (NN) applications on general-purpose processors result in a large power and performance overhead, due to the high cost of data movement between the processor and the main memory. Neuromorphic computing systems based on memristor crossbars, perform the NN main operation i.e., vector-matrix multiplications (VMM) in an efficient way in the analog domain. Thus, they circumvent the costly energy overhead of its digital counterpart. It can be expected that neuromorphic systems will be used initially as complements to current high-performance systems rather than as a replacement. This paper presents NeuroVP, a virtual platform integrating a neuromorphic accelerator, developed in SystemC that can model functionality, timing, and power consumption of the components integrating the system. Using NeuroVP to evaluate performance and power consumption at the electronic system level (ESL), it is corroborated that the execution of NN applications with a neuromorphic accelerator yields of up to 46x higher power efficiency and 26x speedup relative to a general-purpose computing system.
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