Institute for Communication Technologies and Embedded Systems

An Investigation on Inherent Robustness of Posit Data Representation

Authors:
Alouani, I. ,  BEN KHALIFA, A. ,  Merchant, F.Leupers, R.
Book Title:
Proceedings of the International Conference on VLSI Design (VLSID)
Pages:
p.p. 276-281
Date:
Feb. 2021
DOI:
10.1109/VLSID51830.2021.00052
hsb:
RWTH-2021-08749
Language:
English
Abstract:
As the dimensions and operating voltages of computer electronics shrink to cope with consumers’ demand for higher performance and lower power consumption, circuit sensitivity to soft errors increases dramatically. Recently, a new data-type is proposed in the literature called emph{posit} data type. Posit arithmetic has absolute advantages such as higher numerical accuracy, speed, and simpler hardware design than IEEE 754-2008 technical standard-compliant arithmetic. In this paper, we propose a comparative robustness study between 32-bit posit and 32-bit IEEE 754-2008 compliant representations. At first, we propose a theoretical analysis for IEEE 754 compliant numbers and posit numbers for single bit flip and double bit flips. Then, we conduct exhaustive fault injection experiments that show a considerable inherent resilience in posit format compared to classical IEEE 754 compliant representation. To show a relevant use-case of fault-tolerant applications, we perform experiments on a set of machine-learning applications.
In more than $95%$ of the exhaustive fault injection exploration, posit representation is less impacted by faults than the IEEE 754 compliant floating-point representation. Moreover, in $100%$ of the tested machine-learning applications, the accuracy of posit-implemented systems is higher than the classical floating-point-based ones.
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