Publication: Scalable and Energy-Efficient Reconfigurable Accelerator for Column-Wise Givens Rotation 

Authors:
Rákossy, Z. E. ,  Merchant, F. ,  Acosta Aponte, A. ,  Nandy, S. K. ,  Chattopadhyay, A.
Book Title:
22nd IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
Publisher:
IEEE
Address:
Playa-del-Carmen, Mexico
Date:
Oct. 2014
DOI:
10.1109/VLSI-SoC.2014.7004166
Language:
English

Abstract

A new layered reconfigurable architecture is pro-
posed which exploits modularity, scalability and flexibility to
achieve high energy efficiency and memory bandwidth. Using two
flavors of Column-wise Givens rotation, derived from traditional
Fast Givens and Square root and Division Free Givens Rotation
algorithms the architecture is thoroughly evaluated for scalability,
speed, area and energy. Combining an efficient mapping strategy
of the highly parallel algorithms capable of annihilation of
multiple elements of a column of the input matrix and using the
new features of the architecture, 9 architectural variants were
explored achieving a clean trade-off of energy versus area, while
keeping execution speed comparable.

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