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A Flexible ASIP Architecture for Connected Components Labeling: Implementation, Lessons Learned, and Integration into Novel Design Tools

Authors:: Eusse, J. F. , Leupers, R.
Date:: Feb. 2016
Note:: www.ims.uni-hannover.de/tensilica_day.html
Language:: English
Abstract:: The implementation of a tailored processor capable of identifying connected regions of pixels in a Full-HD image is introduced as an industrial case study. The proposed architecture is able to process data in real time, while being flexible enough to accommodate different image and pixel formats. Moreover, state-of-the-art limitations in terms of arbitrarily complex image handling are overcome by software, further proving the inherent flexibility claim attached to ASIP architectures. Methodological observations made through the design of the case study are presented. These observations are then utilized to motivate the proposal of new tools intended to expedite the design process. Novel performance estimation techniques and application analysis tools will be presented. These are not intended to replace existing languages or frameworks, but seek to complement the overall flow by allowing the designer to perform informed design decisions before architectural implementation, processor synthesis, tool-chain generation, and simulation. This leads to a higher probability of having first-time architectural success.
Download:: BibTeX