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Concurrent Memory Subsystem and Application Optimization for ASIP Design

Authors:: Eusse, J. F. , Fernandez, F. , Leupers, R. , Ascheid, G.
Book Title:: Proceedings of the International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation
Series:: SAMOS
Date:: Jul. 2016
Language:: English
Abstract:: The design of an adequate memory subsystem is critical for the achievement of high performance in application specific and data plane processors. Applications running on such processors must fully exploit the memory hierarchy, so that the gains achieved due to hardware optimization are not invalidated by software inefficiency. This paper presents a framework that vertically integrates the process of memory subsystem design with application optimization and algorithmic exploration. The framework is able to predict the impact that a customization in the memory hierarchy will have on performance based on an abstract model, while applying optimization techniques to efficiently utilize the proposed hierarchy. To perform the aforementioned processes, the tool flow relies on source level information and a novel data model, instead of repeatedly performing expensive cycle-accurate simulations. Throughout the evaluation, we show that the framework is capable of predicting memory-related performance metrics with an accuracy of 10%, when compared to simulation. Furthermore, we show that the approach is significantly more efficient than simulation, and can lead to gains in designer's productivity up to a factor of 40x.
Download:: BibTeX