Institute for Communication Technologies and Embedded Systems

ASIP Algorithmic/Architectural Co-Exploration based on High Level Performance Estimation

Authors:
Eusse, J. F.
Ph. D. Dissertation
 
School:
RWTH Aachen Univeristy
Adress:
Chair for Software for Systems on Silicon
Date:
Oct. 2019
hsb:
RWTH-2020-01767
Language:
English
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