Institute for Communication Technologies and Embedded Systems

Scalable and Efficient Linear Algebra Kernel Mapping for Low Energy Consumption on the Layers CGRA

Authors:
Rákossy, Z. E. ,  Stengele, D. ,  Acosta Aponte, A. ,  Chafekar, S. ,  Bientinesi, P. ,  Chattopadhyay, A.
Editors:
Sano, K. ,  Soudris, D. ,  Hübner, M. ,  Diniz, P. C.
Book Title:
International Symposium on Applied Reconfigurable Computing
Publisher:
Springer International Publishing
Series:
Lecture Notes in Computer Science
Volume:
9040
Pages:
p.p. 301-310
Address:
Bochum, Germany
Date:
Apr. 2015
DOI:
0.1007/978-3-319-16214-0_25
Language:
English
Abstract:
The scalable coarse-grained reconfigurable archi- tecture, Layers, exploits functional parallelism of memory access, data movement and processing to gain high energy efficiency, while a functional reconfiguration-based programming model allows an easy programming model. In this paper, architecture- aware and scalable application mapping is proposed for 3 important kernels from the Numerical Linear Algebra domain, to exploit the architectural features to reach asymptotically optimal efficiency and a low energy consumption. Performance and power evaluations were done with input data set matrix sizes ranging from 64×64 to 16384×16384. 12 architectural variants with up to 10×10 processing elements were used to explore scalability of the mapping and the architecture, achieving < 10% energy increase for architectures up to 8×8 PEs coupled with performance speed- ups of more than an order of magnitude. This enables a clean area-performance trade-off while keeping energy constant over the variants.
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