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High-Level Modeling and Synthesis for Embedded FPGAs

Authors:: Chen, X. , Li, S. , Schleifer, J. , Coenen, T. , Chattopadhyay, A. , Ascheid, G. , Noll, T.
Book Title:: Proceedings of the Conference on Design, Automation & Test in Europe (DATE)
Date:: Mar. 2013
Language:: English
Abstract:: The fast evolving applications in modern digital signal processing have an increasing demand for components which have high computational power and energy efficiency without compromising the flexibility. Embedded FPGA, which is the customized FPGA having heterogeneous fine-grained application specific operations and routing resources, has shown significantly improved efficiency in terms of throughput, power dissipation and chip area for the targeted application domain. On the other hand, the complexity of such architecture makes it difficult to efficiently explore the architecture and design a retargetable flow for application synthesis. In this work, we propose framework for the design of embedded FPGA (eFPGA) architectures, which is extended from an existing framework for Coarse-Grained Reconfigurable Architectures (CGRAs). The framework is composed of a high-level modeling formalism for eFPGAs to explore the mapping space, and a retargetable application synthesis flow. To enable fast design space exploration, a novel force-directed placement algorithm is proposed. Finally, we demonstrate the efficacy of this framework with demanding application kernels.
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