Institute for Communication Technologies and Embedded Systems

Hardware-Security: Circuit Design


Nowadays, it has become a major challenge to secure a hardware design from being tampered with while in the hands of external design houses or in the fabrication. These malicious modifications imposed by external parties are known as hardware Trojans. Trojans can lead to serious repercussions, including data leakage, denial of service attacks and others.


Here at the Chair for Software for Systems on Silicon (SSS), we are looking into novel ways of securing hardware designs (in particular processor cores) against hardware Trojans, taking the complexity of modern circuits into account. In BioNanoLock project we are trying to enhance the hardware security by using (bio)chemical key.


We are looking into several aspects of securing the hardware. Some example tasks are as follows:

  • Implementation of logic gates based on chemical information
  • Exploring new methodologies to secure hardware designs
  • Design and implementation of readout circuits for chemical reaction monitoring
  • Design of multi-valued logic gates
  • Evaluation and comparison of the chemical-based logic gate with existing methodologies in terms of area/delay/power vs. security for hardware models of processor cores
  • Hardware security metrics



Depending on the actual task, the following is essential:

  • Experience in PCB design
  • Experience with FPGA, Verilog and Spice
  • Basic understanding of the hardware design and fabrication flow
  • Some experience with emerging technologies such as ion-sensitive field-effect transistors (nice to have)
  • Some experience with Cadence, Python (nice to have)

A background on hardware security is not necessary, but appreciated. In case of interest, please send me an email including the following:

  • Latest transcript of records
  • A brief description of your background and motivation
  • CV (if available)