Institute for Communication Technologies and Embedded Systems



Energy-efficient Mapping for Reactive and Adaptive Applications for Multiprocessor Architectures

Multiprocessors systems are nowadays the de-facto standard in practically all modern computing applications, for instance in the domains of automotive, telecommunication and entertainment. Their advantage comes from the combination of a high performance and a reasonable power budget. However, multiprocessor systems present still several challenges in terms of programmability. There is an increasing gap between the capability of modern multi-core devices and the ability to efficient write software in order to program them (hardware-software gap). This is confirmed by the small amount of solutions available on the market. In order to close the hardware-software gap, the ICE institute spin-off Silexica was founded in 2014, which is now offering a wide set of tools which address this challenges.

Objectives and Methodological Approach

In the context of the EM-RAM project, the consortium aims at extending the tools provided by Silexica in order to enhance them with new models and algorithms. The motivation for this is that completely static application models today are not sufficient to properly describe, analyze and optimize automotive and Industry 4.0 applications. Better results can be obtained using event-based models that dynamically adapt at runtime. Therefore, the scope of this project is to provide tools and methodologies to simplify the development of reactive and adaptive applications. Moreover, another important aspect is the energy efficiency of the design. The target of this project is to optimize the mapping of the application to the hardware platform simultaneously considering performance and power consumption by exploring the trade-off between these two contrasting requirements. The cooperation with Videantis GmbH will be provide realistic test cases in video and embedded vision fields.

Innovation Perspectives

The support of reactive behaviour and a power-aware performance optimization will be important milestones to close the gap between the potential of the hardware platform and software development. The techniques developed in this research project will contribute to the improvement of the programmability of modern multiprocessor systems, as well as to the competitiveness of the industrial partners.




  • Silexica GmbH
  • Videantis GmbH
  • TU Dresden, Chair for Compiler Construction
  • RWTH Aachen, Chair for Software for Systems on Silicon