Institute for Communication Technologies and Embedded Systems

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Felix Staudigl, M.Sc.

Felix

Scientific Staff

Room: 502
+49 241 80-27623
+49 241 80-28306
felix.staudigl(at)ice.rwth-aachen.de
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Research Interest

Neuromorphic Computing
Hardware Security
DNN Accelerators

Projects

Collaborative projects:
- NEUROTEC

Teaching

PiCar Project

Student assistants:

Hazem Al Indari

Alumni students:

Mohammed Hossein
Felix Veth

Publications

Pelke, R., Cubero-Cascante, J., Bosbach, N., Staudigl, F., Leupers, R. and Joseph, J. M.: CLSA-CIM: A Cross-Layer Scheduling Approach for Computing-in-Memory Architectures, in Proceedings of the Conference on Design, Automation & Test in Europe (DATE), 2024, accepted for publication, 10.48550/arXiv.2401.07671 ©2024 IEEE
Pelke, R., Bosbach, N., Cubero-Cascante, J., Staudigl, F., Leupers, R. and Joseph, J. M.: Mapping of CNNs on multi-core RRAM-based CIM architectures, in 2023 IFIP/IEEE 31th International Conference on Very Large Scale Integration (VLSI-SoC) , Oct. 2023, 10.48550/arXiv.2309.03805 ©2023 IEEE
Reimann, L. M., Staudigl, F. and Leupers, R.: Automated Information Flow Analysis for Integrated Computing-in-Memory Modules, in IEEE NEWCAS, Jun. 2023, 10.1109/NEWCAS57931.2023.10198075 ©2023 IEEE
Staudigl, F., Al Indari, H., Schön, D., Šišejković, D., Merchant, F., Joseph, J. M., Rana, V., Menzel, S. and Leupers, R.: NeuroHammer: Inducing Bit-Flips in Memristive Crossbar Memories, in Proceedings of the Conference on Design, Automation & Test in Europe (DATE), Mar. 2022, 10.23919/DATE54114.2022.9774651 ©2022 IEEE
Staudigl, F., Sturm, K. J. X., Bartel, M., Fetz, T., Šišejković, D., Joseph, J. M., Bolzani Pöhls, L. and Leupers, R.: X-Fault: Impact of Faults on Binary Neural Networks in Memristor-Crossbar Arrays with Logic-in-Memory Computation, in International Conference on Artificial Intelligence Circuits and Systems (AICAS), 2022, accepted for publication ©2022 IEEE
Staudigl, F., Merchant, F. and Leupers, R.: A Survey of Neuromorphic Computing-in-Memory: Architectures, Simulators and Security, in IEEE Design & Test, Sep. 2021, 10.1109/MDAT.2021.3102013 ©2021 IEEE
Galicia, M., BanaGozar, A., Sturm, K. J. X., Staudigl, F., Stuijk, S., Corporaal, H. and Leupers, R.: NeuroVP: A System-Level Virtual Platform for Integration of Neuromorphic Accelerators, in International Conference on Communications and Technology, IEEE SOCC, 2021, 10.1109/SOCC52499.2021.9739585 ©2021 IEEE

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Lorenzo Pfeifer

Niko Zurstrassen