Publications of Rainer Leupers

Publications from 2023 to May/ 2021

• Cubero-Cascante, J., Zurstraßen, N., Nöller, J., Leupers, R. and Joseph, J. M.: parti-gem5: gem5's Timing Mode Parallelised, in Embedded Computer Systems: Architectures, Modeling, and Simulation, Springer Nature Switzerland, 2023, 10.1007/978-3-031-46077-7_12
  
• Zurstraßen, N., Reimann, L. M., Bosbach, N., Jünger, L. and Leupers, R.: Evaluation of the RISC-V Floating Point Extensions, in DVCon, 2023
  
• Reimann, L. M., Erdonmez, S., Šišejković, D. and Leupers, R.: Quantitative Information Flow for Hardware: Advancing the Attack Landscape, in LASCAS 2023, Nov. 2022, 10.48550/arXiv.2211.16891
  
• Birke, S., Hartmann, B., Auras, D., Wloka, M., Ascheid, G. and Leupers, R.: Design and Exploration of an ARC-Coprocessor for LSTM Based Audio Applications, in 2022 IEEE Nordic Circuits and Systems Conference (NorCAS) , Oct. 2022, 10.1109/NorCAS57515.2022.9934553 ©2022 IEEE
  
• Singh, S., Bodapati, S., Patkar, S., Leupers, R., Chattopadhyay, A. and Merchant, F.: PA-PUF: A Novel Priority Arbiter PUF, in VLSI-SoC, Oct. 2022, accepted for publication ©2022 IEEE
  
• Moussavi, E., Šišejković, D., Singh, A., Kizatov, D., Leupers, R., Ingebrandt, S., Pachauri, V. and Merchant, F.: A Temperature Independent Readout Circuit for ISFET-Based Sensor Application, in 2022 IEEE 23rd Latin American Test Symposium (LATS), pp. 1-4, Sep. 2022, 10.1109/LATS57337.2022.9937020
  
• Moussavi, E., Šišejković, D., Brings, F., Kizatov, D., Singh, A., Xuan , T. V., Ingebrandt, S., Leupers, R., Pachauri, V. and Merchant, F.: pHGen: A pH-Based Key Generation Mechanism Using ISFETs, in IEEE International Symposium on Hardware Oriented Security and Trust (HOST), pp. 61-64, Jun. 2022, 10.1109/HOST54066.2022.9840282 ©2022 IEEE
  
• Galicia, M., Merchant, F. and Leupers, R.: A Parallel SystemC Virtual Platform for Neuromorphic Architectures, in International Symposium on Quality Electronic Design (ISQED) 2022, Apr. 2022, 10.1109/ISQED54688.2022.9806235 ©2022 IEEE
  
• Staudigl, F., Al Indari, H., Schön, D., Šišejković, D., Merchant, F., Joseph, J. M., Rana, V., Menzel, S. and Leupers, R.: NeuroHammer: Inducing Bit-Flips in Memristive Crossbar Memories, in Proceedings of the Conference on Design, Automation & Test in Europe (DATE), Mar. 2022, 10.23919/DATE54114.2022.9774651 ©2022 IEEE
  
• Galicia, M., Menzel, S., Merchant, F., Müller, M., Chen, H.-Y. , Zhao, Q.-T. , Cüppers, F. , Jalil, A. R. , Shu, Q. , Schüffelgen, P., Mussler, G., Funck, C. , Lanius, C. , Wiefels, S. , von Witzleben, M. , Bengel, C. , Kopperberg, N. , Ziegler, T. , Walied, R. , Krüger, A. , Pöhls, L. , Dittmann, R. , Hoffmann-Eifert, S. , Rana, V., Grützmacher, D. , Wuttig, M. , Wouters, D. , Vescan, A. , Gemmeke, T. , Knoch, J. , Lemme, M. , Leupers, R. and Waser, R.: NEUROTEC I: Neuro-inspired Artificial Intelligence Technologies for the Electronics of the Future, in Proceedings of the Conference on Design, Automation & Test in Europe (DATE), Mar. 2022, 10.23919/DATE54114.2022.9774755 ©2022 IEEE
  
• Šišejković, D., Collini, L., Tan, B., Pilato, C., Karri, R. and Leupers, R.: Designing ML-Resilient Locking at Register-Transfer Level, in 59th ACM/EDAC/IEEE Design Automation Conference (DAC), p. 769–774, Association for Computing Machinery, 2022, ISBN: 978-1-45039-142-9, 10.1145/3489517.3530541 ©2022 IEEE
  
• Bosbach, N., Jünger, L., Joseph, J. M. and Leupers, R.: NISTT: A Non-Intrusive SystemC-TLM 2.0 Tracing Tool, in 2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration (VLSI-SoC) , IEEE, 2022, ISBN: 978-1-66549-006-1, ISSN: 2324-8440, 10.1109/VLSI-SoC54400.2022.9939578 ©2022 IEEE
  
• Staudigl, F., Sturm, K. J. X., Bartel, M., Fetz, T., Šišejković, D., Joseph, J. M., Bolzani Pöhls, L. and Leupers, R.: X-Fault: Impact of Faults on Binary Neural Networks in Memristor-Crossbar Arrays with Logic-in-Memory Computation, in International Conference on Artificial Intelligence Circuits and Systems (AICAS), 2022, accepted for publication ©2022 IEEE
  
• Birke, S., Hartmann, B., Auras, D., Wloka, M., Ascheid, G. and Leupers, R.: Design and Exploration of an ARC-Coprocessor for LSTM Based Audio Applications, in 2022 IEEE Nordic Circuits and Systems Conference (NorCAS), pp. 1-7, 2022, 10.1109/NorCAS57515.2022.9934553 ©2022 IEEE
  
• Zurstraßen, N., Jünger, L., Kogel, T., Keding, H. and Leupers, R.: AMAIX In-Depth: A Generic Analytical Model for Deep Learning Accelerators, in International Journal of Parallel Programming, 2022, 10.1007/s10766-022-00728-3
  
• Reimann, L. M., Hanel, L., Šišejković, D., Merchant, F. and Leupers, R.: QFlow: Quantitative Information Flow for Security-Aware Hardware Design in Verilog, in Proceedings of the International Conference on Computer Design (ICCD) , pp. 603-607, Oct. 2021, 10.1109/ICCD53106.2021.00097 ©2021 IEEE
  
• Joseph, J. M., Baloglu, M. S. , Pan, Y., Leupers, R. and Bamberg, L.: NEWROMAP: mapping CNNs to NoC-interconnected self-contained data-flow accelerators for edge-AI, in NOCS '21: Proceedings of the 15th IEEE/ACM International Symposium on Networks-on-Chip, p. 15–20, Oct. 2021, 10.1145/3479876.3481591
  
• Staudigl, F., Merchant, F. and Leupers, R.: A Survey of Neuromorphic Computing-in-Memory: Architectures, Simulators and Security, in IEEE Design & Test, Sep. 2021, 10.1109/MDAT.2021.3102013 ©2021 IEEE
  
• Šišejković, D., Merchant, F., Reimann, L. M. and Leupers, R.: Deceptive Logic Locking for Hardware Integrity Protection against Machine Learning Attacks, in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Jul. 2021, ISSN: 1937-4151, 10.1109/TCAD.2021.3100275 ©2021 IEEE
  
• Šišejković, D., Merchant, F., Reimann, L. M., Srivastava, H., Hallawa, A. and Leupers, R.: Challenging the Security of Logic Locking Schemes in the Era of Deep Learning: A Neuroevolutionary Approach, in ACM Journal on Emerging Technologies in Computing Systems (JETC), Vol. 17, No. 3, Association for Computing Machinery, p. 26, May. 2021, ISSN: 1550-4832, 10.1145/3431389
  

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