Bayesian machine learning on neuromorphic architectures

Background

Ultra-low power, fully programmable neuromorphic computing is one of the important research topic in industry and academia. This work is conducted in cooperation with an international silicon company dedicated to neuromorphic computing for sensor analytics and machine learning – powered by brain-inspired technology. Their architecture is constructed as a massively parallel SoC (over 100 cores), optimized for machine-learning inference and data-flow applications.

Description

Spiking neural networks can perform Bayesian inference in a highly accelerated form. Such models are adaptable and robust with respect to noise. An example is in hearing aids that adapt some of the acquisition parameters in real-time. The goal of this project is to enable Bayesian Machine Learning Algorithm on a neuromorphic compute architecture. The successful candidate will be given a chance to publish his findings (if relevant) to the scientific community through a peer-reviewed publication.

Tasks

  • Understanding on how Bayesian machine learning can be applied on a state-of-the-art neuromorphic computer architecture    
  • Development of a running demo on a SoC

Requirements

Must have:

  • Master student with electrical/computer engineering background
  • Available for a period of 9-12 months
  • Strong background in Computer Architecture or Advanced Digital System Design
  • Strong programming background (preferably with System/C++)
  • Strong background in advanced computer architectures and digital design
  • Good understanding of networks on chips architectures and concepts
  • “Can-do” mentality, excellent problem-solving capabilities, and the motivation to dive deep into a novel neuromorphic compute architecture

Good to have:

  • Understanding of (convolutional) neural networks