Boolean function extraction algorithm for next-gen AI hardware

Next-generation AI hardware uses brain-inspired structures using ReRAM.

Such new hardware paradigms come with new hardware security challenges.

One such challenge is intellectual property extraction through power sidechannels.

In previous work, we developed EXAMINER, a query learning algorithm capable of extracting

boolean functions that were synthesized with SIMPLER-MAGIC.

In this master thesis, you would extend the algorithm to allow extraction of more complicated functions.

Specifically, you would look at what happens when multiple logic gates are executed at once.

• Learn how ReRAM hardware works and how its power consumption varies
• Understand the existing algorithm and its limitations
• Analyze how parallel execution of gates changes the extraction process
• Extend the algorithm to handle that
• Demonstrate extraction on simulated example circuits