DSPstoneDSP Compiler and Processor Evaluation
Projects of the Group on DSP Tools
DSP Compiler and Processor Evaluation - DSPstone
How good are Compilers for DSP-architectures ?
This was the question in 1995 when we started to measure the performance of commercial available DSP-compilers. The performance was measured in such a way that the code produced by the compiler was compared to hand-written assembly code.
The difference between theses two implementations is measured in terms of code-size and execution time. This was done for several architectures in order to gain information about the abilities of the compilers to address certain features of the architecture.
Having a look at the Analog Devices DSP we clearly see that the handwritten assembly code almost outperforms the code produced by the compiler. The execution of the compiler generated code takes 8 times longer than the one written by hand. The code size also is significantly larger. This means if you develop your application with such a compiler you'll have to take a much faster DSP, spend more money for external memory. As a result nearly all time-critical applications are implemented by hand. Some of the reasons why DSP-Compilers are so bad are:
- unability to use machine idioms (MAC-operation)
- unability to make use of certain architectural features (zero overhead loops)
- unability to make use of possible instruction level parallelism
Most of the DSP-compilers are based on GPP-(general purpose-processor) compilers. Therefore the results are not very surprising.
- Willems, M., Zivojnovic, V., and Meyr, H.:DSP-Compiler: Produktqualität für kontrolldominierte Applikationen?,
Proceedings of DSP Deutschland 96, pp. 49–56, Oct. 1996.
- Willems, M. and Zivojnovic, V.:DSP-Compiler: Product Quality for Control-Dominated Applications?,
in Proc. Int. Conf. on Signal Processing Application and Technology (ICSPAT) (Boston), pp. 752–756, Oct. 1996.
- Willems, M., Warmers, M., and Zivojnovic, V.:DSP-Compiler: auf dem Weg zum Produktionstool ?,
Design & Elektronik, pp. 47–48, Dec. 1995.
- Zivojnovic, V., Schraut, H., Willems, M., and Schoenen, R.:DSPs, GPPs, and multimedia applications: An evaluation using DSPstone,
in Proc. Int. Conf. on Signal Processing Application and Technology (ICSPAT) (Boston), Oct. 1995.
- Willems, M., Jersak, M., and Zivojnovic, V.:DSP-bezogene Spracherweiterungen: Möglichkeiten und Grenzen,
Proc. of DSP Deutschland 95, München, pp. 100–110, Oct. 1995.
- Zivojnovic, V., Martinez, J., Schläger, C., and Meyr, H.:DSPstone: A DSP-Oriented Benchmarking Methodology,
in Proc. of ICSPAT'94 - Dallas Oct. 1994.
News >> News >> News
During May 24/25, 2018 the ICE team visited the University of Kaiserslautern and met the local
Investment will fund the further development of a Simulation Platform for software developers in
The Paper titled "ESL Black Box Power Estimation: Automatic Calibration for IEEE UPF 3.0 Power