Fast Simulation of Programmable DSP Architectures

Compiled Simulation - SuperSim

SuperSim is a fast simulator for programmable DSP architectures that is based on the principle of the compiled simulation.

Unlike existing, commercially available simulators that are of interpretive character, the decoding and the scheduling of the simulation are performed at compile-time. On the same level of accuracy the technique allows speedups up to three orders of magnitude. This speedup enables the user to explore algorithms, hardware/software tradeoffs before any hardware implementation. Moreover, the user can tailor the compiled simulation to trade between speed and accuracy.


Zivojnovic, V. and Meyr, H.: Compiled HW/SW Co-Simulation, in Proceedings of the Design Automation Conference (DAC)(Las Vegas), pp. 690-695, Jun. 1996

Zivojnovic, V., Pees, S., Schläger, C., Weber, R. and Meyr, H.: SuperSim - A new technique for simulation of programmable DSP architectures, in Proc. Int. Conf. on Signal Processing Application and Technology (ICSPAT)(Boston), pp. 1748-1763, Oct. 1995

Zivojnovic, V., Tjiang, S. and Meyr, H.: Compiled simulation of programmable DSP architectures, in Proc. of IEEE Workshop on VLSI Signal Processing(Sakai, Osaka), pp. 187-196, Oct. 1995