SPAM

A joint DSP compiler project of Synopsys, Princeton University, Aachen University and the MIT

    Project Intention of SPAM

    SPAM is a joint research project on compiler design including the following partners:

    • Synopsys Inc., Mountain View, CA
    • Princeton University, Princeton, NJ
    • Aachen University of Technology, Aachen, Germany
    • Massachusetts Institute of Technology, Cambridge, MA


    The project's intention is to develop a retargetable optimizing compiler for embedded processors .

    For more detailed information refer to the SPAM homepage.

    Role of RWTH Aachen

    Research at RWTH Aachen related to the SPAM project covers the field of

    • compiler benchmarking
    • DSP-oriented language extensions to ANSI-C
    • tool support for fixed-point programming
    • compiled simulation
    • optimized code generation for DSP`s


    The following members of RWTH Aachen are involved in the SPAM project:

    • H. Meyr (head of department),
    • A. Ropers,
    • S. Pees,
    • H. Keding

    Publications

    Willems, M., Keding, H., Zivojnovic, V. and Meyr, H.: Modulo-Addressing Utilization in Automatic Software Synthesis for Digital Signal Processors, In Proceedings of the IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP) 1997


    Willems, M., Zivojnovic, V. and Meyr, H.: DSP-Compiler: Produktqualität für kontrolldominierte Applikationen?, In Proceedings of DSP Deutschland 96 , p.p. 49-56 Oct/1996


    Willems, M. and Zivojnovic, V.: DSP-Compiler: Product Quality for Control-Dominated Applications?, in Proc. Int. Conf. on Signal Processing Application and Technology (ICSPAT) , p.p. 752-756 , (Boston) Oct/1996


    Schläger, C. and Zivojnovic, V.: C/C++ - Based Techniques for Production-Quality DSP Code Development, in Proc. Int. Conf. on Signal Processing Application and Technology (ICSPAT) , (Boston) Oct/1995


    Willems, M., Warmers, M. and Zivojnovic, V.: DSP-Compiler: auf dem Weg zum Produktionstool ?, In Design & Elektronik , p.p. 47-48 , No. 24/25 Dec/1995


    Willems, M., Jersak, M. and Zivojnovic, V.: DSP-bezogene Spracherweiterungen: Möglichkeiten und Grenzen, In Proc. of DSP Deutschland 95, München , p.p. 100-110 Oct/1995


    Zivojnovic, V.: Compilers for digital signal processors, In DSP and Multimedia Technology Vol. 4 , p.p. 27-45 , No. 5 Aug/1995


    Liao, S., Devadas, S., Keutzer, K., Tjiang, S., Wang, A., Araujo, G., Sudarsanam, A., Malik, S., Zivojnovic, V. and Meyr, H.: Code generation and optimization for embedded digital signal processors, in Hardware Software Codesign in Hardware Software Codesign , NATO Advanced Study Institute, 1995


    Zivojnovic, V., Pees, S., Schläger, C., Weber, R. and Meyr, H.: SuperSim - A new technique for simulation of programmable DSP architectures, in Proc. Int. Conf. on Signal Processing Application and Technology (ICSPAT) , p.p. 1748-1763 , (Boston) Oct/1995


    Zivojnovic, V., Tjiang, S. and Meyr, H.: Compiled simulation of programmable DSP architectures, in Proc. of IEEE Workshop on VLSI Signal Processing , p.p. 187-196 , (Sakai, Osaka) Oct/1995


    Zivojnovic, V., Schraut, H., Willems, M. and Schoenen, R.: DSPs, GPPs, and multimedia applications: An evaluation using DSPstone, in Proc. Int. Conf. on Signal Processing Application and Technology (ICSPAT) , (Boston) Oct/1995


    Zivojnovic, V., Martinez, J., Schläger, C. and Meyr, H.: DSPstone: A DSP-Oriented Benchmarking Methodology, in Proc. of ICSPAT'94 - Dallas Oct/1994