Institute for Communication Technologies and Embedded Systems

Compilation and Architecture Exploration for Network Processors


  • New networking applications demand for high bandwidth, flexibility, and quality-of-service
  • Network Processing Units (NPUs) are special-purpose processors designed to meet these goals
  • Software tool support for NPUs is still very limited



  • Provide advanced C/C++ compiler technology for NPUs
  • Use compiler-in-the-loop exploration for optimizing NPU architectures



Hanno Scharw├Ąchter

Project description

Typical network processors have a set of programmable processors designed to efficiently execute an instruction set specifically designed for packet processing and forwarding. Overall performance is further enhanced with the inclusion of specialized coprocessors (e.g. for table lookup or checksum computation) and by expanding the data flow, supporting necessary packet modifications. Due to the specialized architectures of network processing units (NPUs), classical compiler technology is often insufficient and so, more dedicated code generation and optimization techniques are needed to fully exploit the processors' capabilities and demands, e.g. by Bit Packet Addressing. Furthermore, the huge number of programmable cores demands for automated task-partitioning algorithms to fully exploit the high computing potential of network processors.