Publications by year

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Available years

2021202020192018201720162015201420132012201120102009200820072006200520042003200220012000199919981997199619951994199319921991199019891988198719861985198419831982198019791978

2021

Chen, X., Liu, M., Gui, G., Abedisi, B., Gacanin, H. and Sari, H.: Complex Deep Neural Network Based Intelligent Signal Detection Methods for OFDM-IM Systems, in The 2021 Joint EuCNC & 6G Summit, 8-11 June 2021, Porto, Portugal., Jun. 2021, accepted for publication


Saxena, V., Reddy, A., Jonathan, N., Gustafson, J. L., Sangeeth, N., Leupers, R. and Merchant, F.: Brightening the Optical Flow through Posit Arithmetic, in International Symposium on Quality Electronic Design (ISQED), Apr. 2021, accepted for publication ©2021 IEEE


Yin, Y., Liu, M., Gacanin, H., Sari, H. and Adachi, F.: Cross-Layer Resource Allocation for UAV-Assisted Wireless Caching Networks with NOMA, in IEEE Transactions on Vehicular Technology, IEEE, Mar. 2021, accepted for publication ©2021 IEEE


Popoola, S., Abedisi, B., Hammoudeh, M., Gui, G. and Gacanin, H.: Hybrid Deep Learning for Botnet Attack Detection in the Internet-of-Things Networks, in IEEE Internet of Things Journal, Vol. 8, No. 6, IEEE, Mar. 2021, accepted for publication ©2021 IEEE


Alouani, I., BEN KHALIFA, A., Merchant, F. and Leupers, R.: An Investigation on Inherent Robustness of Posit Data Representation, in Proceedings of the International Conference on VLSI Design (VLSID), Feb. 2021, accepted for publication ©2021 IEEE


Wang, J., Liu, M., Sun, J., Gui, G., Gacanin, H., Sari, H. and Adachi, F.: Multiple Unmanned Aerial Vehicles Deployment and User Pairing for Non-Orthogonal Multiple Access Schemes, in IEEE Internet of Things Journal, Vol. 8, No. 3, pp. 1883-1895, Feb. 2021, 10.1109/JIOT.2020.3015702 ©2021 IEEE


Nasser, A., Muta, O. and Gacanin, H.: Joint User Pairing and Power Allocation with Compressive Sensing in NOMA Systems, in IEEE Wireless Communications Letters, Vol. 10, No. 1, pp. 1-1, Jan. 2021, ISSN: 2162-2345, 10.1109/LWC.2020.3023619 ©2021 IEEE


Yin, Y., Liu, M., Gui, G., Gacanin, H. and Adachi, F.: QoS-Oriented Dynamic Power Allocation in NOMA-based Wireless Caching Networks, in IEEE Wireless Communications Letters, Vol. 10, No. 1, pp. 82-86, Jan. 2021, ISSN: 2162-2345, 10.1109/LWC.2020.3021204 ©2021 IEEE


Jünger, L., Bianco, C., Niederholtmeyer, K., Petras, D. and Leupers, R.: Optimizing Temporal Decoupling using Event Relevance, in Proceedings of the Asia South Pacific Design Automation Conference (ASP-DAC), 2021, accepted for publication


Rai, S., Garg, S., Pilato, C., Herdt, V., Moussavi, E., Šišejković, D., Karri, R., Drechsler, R., Merchant, F. and Kumar, A.: Vertical IP Protection of the Next-Generation Devices: Quo Vadis?, in Proceedings of the Conference on Design, Automation & Test in Europe (DATE), IEEE, 2021, accepted for publication


Polian, I., Altmann, F., Arul, T., Boit, C., Brederlaw, R., Davi, L., Drechsler, R., Du, N., Eisenbarth, T., Gü­ney­su, T., Hermann, S., Hiller, M., Leupers, R., Merchant, F., Mussenbrock, T., Katzenbeisser, S., Kumar, A., Kunz, W., Mikolajick, T., Pachauri, V., Seifert, J.-P., Torres, F. S. and Trommer, J.: Nano Security: From Nano-Electronics to Secure Systems, in Proceedings of the Conference on Design, Automation & Test in Europe (DATE), IEEE, 2021, accepted for publication


Joseph, J. M., Bamberg, L., Geonhwa, J., Chien, R.-T., Leupers, R., García-Ortiz, A., Krishna, T. and Pionteck, T.: Bridging the F requency Gap in Heterogeneous 3D SoCs through Technology-Specific NoC Router Architectures, in Proceedings of the Asia South Pacific Design Automation Conference (ASP-DAC), 2021, accepted for publication, 10.1145/3394885.3431421


Joseph, J. M., Samajdar, A., Zhu, L., Leupers, R., Lim, S.-K., Pionteck, T. and Krishna, T.: Architecture, Dataflow and Physical Design Implications of 3D-ICs for DNN-Accelerators, in International Symposium on Quality Electronic Design (ISQED), 2021, accepted for publication


Merchant, F., Šišejković, D., Reimann, L. M., Yasotharan, K., Grass, T. and Leupers, R.: ANDROMEDA: An FPGA Based RISC-V MPSoC Exploration Framework, in Proceedings of the International Conference on VLSI Design (VLSID), 2021, accepted for publication ©2021 IEEE