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Energy-efficiency of floating-point and fixed-point SIMD cores for MIMO processing systems

Authors:: Guenther, D. , Bytyn, A. , Leupers, R. , Ascheid, G.
Book Title:: Proceedings of the International Symposium on System-on-Chip (SoC)
Publisher:: IEEE
Pages:: p.p. 1-7
Address:: Tampere
Date:: Oct. 2014
DOI:: 10.1109/ISSOC.2014.6972429
Language:: English
Abstract:: For computational tasks with regular data access patterns, e.g. vector arithmetic, single instruction multiple data (SIMD) processor cores present a viable alternative to application-specific integrated circuits (ASICs). Even though the additional flexibility of a programmable core comes at the expense of reduced area- and energy efficiency, this price is potentially worth paying in application domains with a multitude of standards and use cases as it is the case in the domain of wireless communications. The high dynamic range of values that occurs in multi-antenna wireless baseband processing calls for the use of numerical stabilization measures like QR factorization and scaling when operating on a fixed-point processor core. A floating-point core on the other hand covers a wider dynamic range, rendering such measures unnecessary at the price of increased power consumption. This work compares a floating-point and a fixed-point SIMD core in a case study of linear MIMO detection. After evaluating the numerical precision requirements, the achievable throughput of both cores is compared along with the maximum achievable area- and energy efficiency for several use cases, resulting in an assessment as to which number format is best suited for which use case.
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