Institute for Communication Technologies and Embedded Systems

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Automatic Detection of Concurrency Bugs through Event Ordering Constraints

Authors:
Murillo, L. G. ,  Wawroschek, S. ,  Castrillon, J. ,  Leupers, R. ,  Ascheid, G.
Book Title:
Proceedings of the Conference on Design, Automation & Test in Europe (DATE)
Address:
Dresden, Germany
Date:
Mar. 2014
Language:
English
Abstract:
Writing correct parallel SW for modern multi-processor systems-on-chip (MPSoCs) is a complicated task. Programmers can rarely anticipate all possible external and internal interactions in complex concurrent systems. Concurrency bugs originating from races and improper synchronization are difficult to understand and reproduce. Furthermore, traditional debug and verification practices for embedded systems lack support to address this issue efficiently. For instance, programmers still need to step through several executions until finding a buggy state or analyze complex traces,
which results in productivity losses. This paper proposes a new debug approach for MPSoCs that combines dynamic analysis and the benefits of virtual platforms. All in all, it (i) enables automatic exploration of SW behavior, (ii) identifies problematic concurrent interactions,
(iii) provokes possibly erroneous executions and, ultimately,
(iv) detects concurrency bugs.The approach is demonstrated on an industrial-strength virtual platform with a full Linux operating
system and real-world parallel benchmarks.
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