Institute for Communication Technologies and Embedded Systems

A Design Flow for Architecture Exploration and Implementation of Partially Reconfigurable Processors

Authors:
Karuri, K. ,  Chattopadhyay, A. ,  Chen, X. ,  Kammler, D. ,  Hao, L. ,  Leupers, R.Meyr, H.Ascheid, G.
Journal:
(IEEE VLSI)
Volume:
16
Page(s):
1281--1294
number:
10
Date:
Oct. 2008
Language:
English
Download:
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