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NISTT: A Non-Intrusive SystemC-TLM 2.0 Tracing Tool

Authors:
Bosbach, N. ,  Jünger, L. ,  Joseph, J. M. ,  Leupers, R.
Book Title:
2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration (VLSI-SoC)
Publisher:
IEEE
Date:
2022
ISBN:
978-1-66549-006-1
ISSN:
2324-8440
DOI:
10.1109/VLSI-SoC54400.2022.9939578
hsb:
RWTH-2022-10336
Language:
English
Abstract:
The increasing complexity of systems-on-a-chip requires the continuous development of electronic design automation tools. Nowadays, the simulation of systems-on-a-chip using virtual platforms is common. Virtual platforms enable hardware/software co-design to shorten the time to market, offer insights into the models, and allow debugging of the simulated hardware. Profiling tools are required to improve the usability of virtual platforms. During simulation, these tools capture data that are evaluated afterward. Those data can reveal information about the simulation itself and the software executed on the platform. This work presents the tracing tool NISTT that can profile SystemC-TLM-2.0-based virtual platforms. NISTT is implemented in a completely non-intrusive way. That means no changes in the simulation are needed, the source code of the simulation is not required, and the traced simulation does not need to contain debug symbols. The standardized SystemC application programming interface guarantees the compatibility of NISTT with other simulations. The strengths of NISTT are demonstrated in a case study. Here, NISTT is connected to a virtual platform and traces the boot process of Linux. After the simulation, the database created by NISTT is evaluated, and the results are visualized. Furthermore, the overhead of NISTT is quantified. It is shown that NISTT has only a minor influence on the overall simulation performance.
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