Institute for Communication Technologies and Embedded Systems

A Critical Evaluation of the Paradigm Shift in the Design of Logic Encryption Algorithms

Authors:
Šišejković, D.Merchant, F.Leupers, R.Ascheid, G. ,  Kiefer, V.
Journal:
2019 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)
Publisher:
IEEE
Page(s):
4
Date:
Apr. 2019
DOI:
10.1109/VLSI-DAT.2019.8741531
hsb:
RWTH-2019-07848
Language:
English
Abstract:
The globalization of the integrated circuit supply chain has given rise to major security concerns ranging from intellectual property piracy to hardware Trojans. Logic encryption is a promising solution to tackle these threats. Recently, a Boolean satisfiability attack capable of unlocking existing logic encryption techniques was introduced. This attack initiated a paradigm shift in the design of logic encryption algorithms. However, recent approaches have been strongly focusing on low-cost countermeasures that unfortunately lead to low functional and structural corruption. In this paper, we show that a simple approach can offer provable security and more than 99% corruption if a higher area overhead is accepted. Our results strongly suggest that future proposals should consider higher overheads or more realistic circuit sizes for the evaluation of modern logic encryption algorithms.
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