A Secure Hardware-Software Solution Based on RISC-V, Logic Locking and Microkernel

Authors:

Šišejković, D. ,  Merchant, F. ,  Reimann, L. M. ,  Leupers, R. ,  Giacometti, M. ,  Kegreiß, S.

Book Title:

Proceedings of the 23nd International Workshop on Software and Compilers for Embedded Systems (SCOPES)

Publisher:

Association for Computing Machinery

Pages:

p. 62–65

Date:

2020

DOI:

10.1145/3378678.3391886

hsb:

RWTH-2021-00340

Language:

English

Abstract

In this paper we present the first generation of a secure platform de- veloped by following a security-by-design approach. The security of the platform is built on top of two pillars: a secured hardware design flow and a secure microkernel. The hardware design is protected against the insertion of hardware Trojans during the production phase through netlist obfuscation provided by logic locking. The software stack is based on a trustworthy and verified microkernel. Moreover, the system is expected to work in an environment which does not allow physical access to the device. Therefore, on-the- field attacks are only possible via software. We present a solution whose security has been achieved by relying on simple and open hardware and software solutions, namely a RISC-V processor core, open-source peripherals and an seL4-based operating system.

Download

BibTeX

Copyright © by IEEE
sisejkovicSCOPES2020.pdf

© 2021 IEEE.Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.

---