Control-Lock: Securing Processor Cores Against Software-Controlled Hardware Trojans

Authors:

Šišejković, D. ,  Merchant, F. ,  Leupers, R. ,  Ascheid, G. ,  Kegreiß, S.

Journal:

Great Lakes Symposium on VLSI (GLSVLSI'19)

Date:

May. 2019

DOI:

10.1145/3299874.3317983

hsb:

RWTH-2019-07016

Language:

English

Abstract

Malicious circuit modifications known as hardware Trojans represent a rising threat to the integrated circuit supply chain. As many Trojans are activated based on a specific sequence of circuit states, we have recognized the ease of utilizing an instruction sequence for Trojan activation inside a processor core as a significant security issue. To protect against this threat, we propose Control-Lock: a novel methodology for securing inter-module control signals against software-controlled hardware Trojans, even if the signals are known to the adversary during fabrication. We demonstrate the approach with a RISC-V processor infected with a denial of service Trojan. We evaluate different Control-Lock encryption schemes with regards to the security-cost trade-off. Our results show that protecting a processor against a software-controlled hardware Trojan exploiting code execution implies an area overhead of only 4.75% as well as a negligible delay and power overhead.

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