Institute for Communication Technologies and Embedded Systems

Achieving Efficient Realization of Kalman Filter on CGRA through Algorithm-Architecture Co-design

Authors:
Merchant, F. ,  Vatwani, T. ,  Chattopadhyay, A. ,  Raha, S. ,  Nandy, S. K. ,  Narayan, R.
Book Title:
Applied Reconfigurable Computing
Date:
May. 2018
DOI:
10.1007/978-3-319-78890-6
hsb:
RWTH-2019-00316
Language:
English
Abstract:
In this paper, we present efficient realization of Kalman Filter (KF) that can achieve up to 65% of the theoretical peak performance of underlying architecture platform. KF is realized using Modified Faddeeva Algorithm (MFA) as a basic building block due to its versatility and REDEFINE Coarse Grained Reconfigurable Architecture (CGRA) is used as a platform for experiments since REDEFINE is capable of supporting realization of a set algorithmic compute structures at run-time on a Reconfigurable Data-path (RDP). We perform several hardware and software based optimizations in the realization of KF to achieve 116% improvement in terms of Gflops over the first realization of KF. Overall, with the presented approach for KF, 4-105x performance improvement in terms of Gflops/watt over several academically and commercially available realizations of KF is attained. In REDEFINE, we show that our implementation is scalable and the performance attained is commensurate with the underlying hardware re- sources.
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