Institute for Communication Technologies and Embedded Systems

Software Compilation Techniques for Heterogeneous Embedded Multi-Core Systems

Authors:
Leupers, R.Aguilar, M. A. ,  Castrillon, J. ,  Sheng, W.
Editors:
Bhattacharyya, S. ,  Deprettere, E. ,  Leupers, R. ,  Takala, J.
Booktitle:
Handbook of Signal Processing Systems
Publisher:
Springer
Date:
2018
DOI:
10.1007/978-3-319-91734-4_28
hsb:
RWTH-2021-00574
Language:
English
Abstract:
The increasing demands of modern embedded systems, such as high-performance and energy-efficiency, have motivated the use of heterogeneous multi-core platforms enabled by Multiprocessor System-on-Chips (MPSoCs). To fully exploit the power of these platforms, new tools are needed to address the increasing software complexity to achieve a high productivity. An MPSoC compiler is a tool-chain to tackle the problems of application modeling, platform description, software parallelization, software distribution and code generation for an efficient usage of the target platform. This chapter discusses various aspects of compilers for heterogeneous embedded multi-core systems, using the well-established single-core C compiler technology as a baseline for comparison. After a brief introduction to the MPSoC compiler technology, the important ingredients of the compilation process are explained in detail. Finally, a number of case studies from academia and industry are presented to illustrate the concepts discussed in this chapter.
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