Publication: Enabling in-memory computation of binary {BLAS} using ReRAM crossbar arrays 

Authors:
Bhattacharjee, D. ,  Merchant, F. ,  Chattopadhyay, A.
Book Title:
VLSI-SoC
Date:
Sep. 2016
ISBN:
978-1-50903-561-8
DOI:
10.1109/VLSI-SoC.2016.7753568
Language:
English

Abstract

Memristive devices, such as ReRAMs, are fast gaining prominence for their low leakage power, high endurance and non-volatile storage capabilities. ReRAM crossbar arrays also found usage as platform for in-memory computing, particularly for data-intensive computations, due to its inherent capability to perform stateful logic operations. Binary matrix and vector operations arise in several applications that require close interaction with the storage, such as Error Correction Codes (ECC), approximate graph mining, and in general, diverse big data applications. In this paper, we explore for the first time, an efficient mapping of Binary Basic Linear Algebra Subprograms (BiBLAS) onto hybrid CMOS-ReRAM crossbar array. We investigate the impact of crossbar configurations on the delay, and area of BiBLAS operations for various vector sizes.

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