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Automatic Parallelization and Accelerator Offloading for Embedded Applications on Heterogeneous MPSoCs

Authors:: Aguilar, M. A. , Leupers, R. , Ascheid, G. , Murillo, L. G.
Book Title:: 53rd Design Automation Conference (DAC)
Address:: Austin, TX, USA
Date:: Jun. 2016
Note:: HiPEAC Paper Award
ISBN:: 978-1-45034-236-0
DOI:: 10.1145/2897937.2897991
Language:: English
Abstract:: MPSoCs have evolved into heterogeneous architectures, where general purpose processors are combined with accelerators. Directive-based programming models such as the OpenMP 4.0 accelerator model have emerged as an approach to parallelize and offload code regions to accelerators. However, existing compiler technologies have focused mainly on parallelization, leaving the challenging task of offloading code regions to the developers. In this paper, we propose a novel approach that addresses parallelization and offloading jointly. Results show that our approach is able to speedup sequential embedded applications significantly on a commercial heterogeneous MPSoC, which incorporates a quad-core ARM cluster and an octa-core DSP cluster.
Download:: BibTeX