Sie verwenden einen Browser, in dem JavaScript deaktiviert ist. Dadurch wird verhindert, dass Sie die volle Funktionalität dieser Webseite nutzen können. Zur Navigation müssen Sie daher die Sitemap nutzen.

You are currently using a browser with deactivated JavaScript. There you can't use all the features of this website. In order to navigate the site, please use the Sitemap .

Improving Performance and Productivity for Software Development on TI Multicore DSP Platforms

Authors:: Aguilar, M. A. , Jimenez, R. , Leupers, R. , Ascheid, G.
Book Title:: Proceedings of the 6th European Embedded Design in Education and Research Conference (EDERC)
Pages:: p.p. 31 - 35
Date:: Sep. 2014
Note:: Best Presentation Award
DOI:: 10.1109/EDERC.2014.6924353
Language:: English
Abstract:: Complexity of modern applications, the performance requirements and the power constraints are the major driving forces that motivate the use of Multiprocessor Systems on Chip (MPSoCs). Programming these platforms is still a big challenge, posing a multitude of software design issues: What is the right MPSoC programming model to capture parallelism?, How to parallelize legacy C code?, How to achieve optimal utilization of processing elements?, How to minimize communication overhead?, How to explore the vast software mapping design space?. Traditional compiler technology does not solve these challenges, as it does not consider the architectural characteristics introduced by MPSoCs. Several research efforts have been directed to address these challenges, one example is the MAPS Compiler (MPSoC Application Programming Studio) that offers facilities for heterogeneous and homogeneous MPSoC programming. In this paper, we focus on the applicability of this tool to the software development on the TI Keystone Multicore DSP platforms. The analysis considers both performance and productivity improvements achieved by MAPS.
Download:: BibTeX