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Synchronization for Hybrid MPSoC Full-System Simulation

Authors:
Murillo, L. G. ,  Eusse, J. F. ,  Jovic, J. ,  Yakoushkin, S. ,  Leupers, R.Ascheid, G.
Book Title:
Design Automation Conference
Series:
(DAC'12), San Francisco, USA
Address:
San Francisco, USA
Date:
Jun/2012
ISBN:
978-1-45031-199-1
DOI:
10.1145/2228360.2228383
Language:
English

Abstract

Full-system simulators are essential to enable early software development and increase the MPSoC programming productivity, however, their speed is limited by the speed of processor models. Although hybrid processor simulators provide native execution speed and target architecture visibility, their use for modern multi-core OSs and parallel software is restricted due to dynamic temporal and state decoupling side effects. This work analyzes the decoupling effects caused by hybridization and presents a novel synchronization technique which enables full-system hybrid simulation for modern MPSoC software. Experimental results show speed-ups from 2x to 45x over instruction-accurate simulation while still attaining functional correctness.

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