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Programming MPSoC platforms: Road works ahead!

Authors:: Leupers, R. , Vajda, A. , Bekooij, M. , Ha , S. , Doemer, R. , Nohl, A.
Book Title:: Proc. of the Design, Automation and Test in Europe Conference and Exhibition (DATE 2009)
Pages:: p.p. pp. 1584-1589
Address:: Nice, France
Date:: Apr. 2009
DOI:: 10.1109/DATE.2009.5090917
Language:: English
Abstract:: This paper summarizes a special session on multicore/ multi-processor system-on-chip (MPSoC) programming challenges. The current trend towards MPSoC platforms in most computing domains does not only mean a radical change in computer architecture. Even more important from a SW developer's viewpoint, at the same time the classical sequential von Neumann programming model needs to be overcome. Efficient utilization of the MPSoC HW resources demands for radically new models and corresponding SW development tools, capable of exploiting the available parallelism and guaranteeing bug-free parallel SW. While several standards are established in the high-performance computing domain (e.g. OpenMP), it is clear that more innovations are required for successful deployment of heterogeneous embedded MPSoC. On the other hand, at least for coming years, the freedom for disruptive programming technologies is limited by the huge amount of certified sequential code that demands for a more pragmatic, gradual tool and code replacement strategy.
Download:: BibTeX