Institute for Communication Technologies and Embedded Systems

Efficient Design Flow for Fixed-Point Systems

Authors:
Keding, H. ,  Coors, M. ,  Meyr, H.
Booktitle:
Circuits and Systems for Wireless Communications
Publisher:
G. S. Moschytz. Kluwer Academic Publishers
Page(s):
265-278
Date:
Jan. 2000
ISBN:
0-306-47303-8
DOI:
10.1007/0-306-47303-8_21
Language:
English
Abstract:
The complexity of DSP systems grows at an ever-increasing rate while the implementation of these designs must meet criteria like minimum cost and a short time to market. Hence there is a growing need for efficient design automation and a seamless design flow that allows the execution of the design steps at the highest suitable level of abstraction. Especially for the design of fixed-point algorithms and systems, tool support is very rare, though for most digital systems the design has to result in a fixed-point implementation. This is due to the fact that these systems are sensitive to power consumption, chip size and price per device. Fixed-point realizations outperform floating-point realizations by far with regard to these criteria. On the other hand, algorithm design starts from a floating-pointdescription in order to initially abstract from all fixed-point effects. The resulting gap between the floating-point prototype and the fixed-point implementation represents one of the major bottlenecks in today’s digital designs. This paper will give a survey of FRIDGE1, a tool suite that permits a seamless design flow, starting from an ANSI-C floating-point algorithm which is then converted to a fixed-point description in fixed-C2. This bit-true description of the algorithm can finally be mapped to different implementation targets, programmable DSPs or dedicated hardware structures.
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