Sie verwenden einen Browser, in dem JavaScript deaktiviert ist. Dadurch wird verhindert, dass Sie die volle Funktionalität dieser Webseite nutzen können. Zur Navigation müssen Sie daher die Sitemap nutzen.

You are currently using a browser with deactivated JavaScript. There you can't use all the features of this website. In order to navigate the site, please use the Sitemap .

Control-Lock: Securing Processor Cores Against Software-Controlled Hardware Trojans

Šišejković, D.Merchant, F.Leupers, R.Ascheid, G. ,  Kegreiss, S.
Great Lakes Symposium on VLSI (GLSVLSI'19)
accepted for publication


Malicious circuit modifications known as hardware Trojans represent a rising threat to the integrated circuit supply chain. As many Trojans are activated based on a specific sequence of circuit states, we have recognized the ease of utilizing an instruction sequence for Trojan activation inside a processor core as a significant security issue. To protect against this threat, we propose Control-Lock: a novel methodology for securing inter-module control signals against software-controlled hardware Trojans, even if the signals are known to the adversary during fabrication. We demonstrate the approach with a RISC-V processor infected with a denial of service Trojan. We evaluate different Control-Lock encryption schemes with regards to the security-cost trade-off. Our results show that protecting a processor against a software-controlled hardware Trojan exploiting code execution implies an area overhead of only 4.75% as well as a negligible delay and power overhead.