Institute for Communication Technologies and Embedded Systems

Trace-based KPN Composability Analysis for Mapping Simultaneous Applications to MPSoC Platforms

Authors:
Castrillon, J. ,  Velasquez, R. ,  Stulova, A. ,  Sheng, W. ,  Ceng, J. ,  Leupers, R.Ascheid, G.Meyr, H.
Book Title:
Proceedings of the Conference on Design, Automation and Test in Europe (DATE '10)
Organization:
EDAA
Pages:
p.p. 753--758
Address:
Dresden, Germany
Date:
Mar. 2010
ISBN:
978-3-98108-016-2
Language:
English
Abstract:
Nowadays, most embedded devices need to support
multiple applications running concurrently. In contrast
to desktop computing, very often the set of applications is
known at design time and the designer needs to assure that
critical applications meet their constraints in every possible
use-case. In order to do this, all possible use-cases, i.e. subset
of applications running simultaneously, have to be verified
thoroughly. An approach to reduce the verification effort, is
to perform composability analysis which has been studied for
sets of applications modeled as Synchronous Dataflow Graphs.
In this paper we introduce a framework that supports a more
general parallel programming model based on the Kahn Process
Networks Model of Computation and integrates a complete
MPSoC programming environment that includes: compilercentric
analysis, performance estimation, simulation as well as
mapping and scheduling of multiple applications. In our solution,
composability analysis is performed on parallel traces obtained
by instrumenting the application code. A case study performed on
three typical embedded applications, JPEG, GSM and MPEG-2,
proved the applicability of our approach.
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