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A Flexible MCMC Detector ASIC

Authors:
Auras, D. ,  Birke, S. ,  Piwczyk, T. ,  Leupers, R.Ascheid, G.
Book Title:
Proceedings of the 2016 International SoC Design Conference (ISOCC)
Date:
Oct. 2016
ISBN:
978-1-50903-219-8
DOI:
10.1109/ISOCC.2016.7799789
Language:
English

Abstract

This paper presents a flexible Markov Chain Monte Carlo based MIMO (multi-antenna) detector ASIC that efficiently uses the available computing resources by leveraging inherent chain-level and symbol-level parallelism offered by the underlying detection algorithm. Compared to a reference architecture from literature, we roughly double the throughput on average, while achieving a speedup of up to 4.5x for certain cases. The implementation layouted for a 90nm CMOS technology requires 1.3mm² and runs at 397 MHz.

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