Books
- Buecs, R., Murillo, L. G., Korotcenko, E., Dugge, G., Leupers, R., Ascheid, G., Ropers, A., Wedler, M., and Hoffmann, A.:Virtual Hardware-in-the-Loop Co-simulation for Multi-domain Automotive Systems via the Functional Mock-Up Interface, Springer International Publishing, selected contributions from fdl 2015 ed., vol. Volume 385 2016 of Lecture Notes in Electrical Engineering - Languages, Design Methods, and Tools for Electronic System Design - Selected Contributions from FDL 2015.
2016, ISBN: 978-3-31931-722-9. - Paolucci, P. S., Bacivarov, I., Goossens, G., Leupers, R., Rousseau, F., Schumacher, C., Thiele, L., and Vicini, P.:EURETILE 2010-2012 summary: first three years of activity of the European Reference Tiled Experiment., arXiv, 2013, ISBN: 978-8-89084-880-3.
- Programming Heterogeneous MPSoCs: Tool Flows to Close the Software Productivity , Springer, Oct. 2013, ISBN: 978-3-31900-674-1.
- Karuri, K. and Leupers, R.:Application Analysis Tools for ASIP Design, Berlin: Springer, June 2011, ISBN: 978-1-44198-254-4.
- Multiprocessor Systems on Chip: Design Space Exploration, Berlin: Springer, Feb. 2011, ISBN: 978-1-44198-152-3.
- Leupers, R. and Temam, O.:Processor and System-on-Chip Simulation, Springer, Sept. 2010, ISBN: 978-1-44196-174-7.
- Bhattacharyya, S., Deprettere, E., Leupers, R., and Takala, J.:Handbook of Signal Processing Systems, Springer, Sept. 2010, ISBN: 978-1-44196-344-4.
- Hohenauer, M. and Leupers, R.:C Compilers for ASIPs: Automatic Compiler Generation with LISA, Heidelberg: Springer, Dec. 2009, ISBN: 978-1-44191-175-9.
- Language-driven Exploration and Implementation of Partially Re-configurable ASIPs, Heidelberg: Springer, Dec. 2008, ISBN: 978-1-40209-296-1.
- Wieferink, A., Meyr, H., and Leupers, R.:Retargetable Processor System Integration into Multi-Processor System-on-Chip Platforms, Heidelberg: Springer, July 2008, ISBN: 1-402-08574-5.
- Schliebusch, O., Meyr, H., and Leupers, R.:Optimized ASIP Synthesis from Architecture Description Language Models, Heidelberg: Springer, Mar. 2007, ISBN: 1-402-05685-0.
- Ienne, P. and Leupers, R.:Customizable Embedded Processors: Design Technologies and Applications, Massachusetts: Morgan Kaufmann, July 2006, ISBN: 0-123-69526-0.
- Kogel, T., Leupers, R., and Meyr, H.:Integrated System-Level Modeling of Network-on-Chip Enabled Multi-Processor Platforms, Heidelberg: Springer, June 2006, ISBN: 1-402-04825-4.
- Hoffmann, A., Meyr, H., and Leupers, R.:Architecture Exploration for Embedded Processors with LISA, Dordrecht, NL: Kluwer Academic Press, Dec. 2002, ISBN: 1-402-07338-0.
- Retargetable Compiler Technology for Embedded Systems - Tools and Applications, Dordrecht, NL: Kluwer Academic Publishers, Nov. 2001, ISBN: 0-792-37578-5.
- Code Optimization Techniques for Embedded Processors - Methods, Algorithms, and Tools, Dordrecht, NL: Kluwer Academic Publishers, Nov. 2000, ISBN: 0-792-37989-6.
- Keding, H., Coors, M., and Meyr, H.:Efficient Design Flow for Fixed-Point Systems, G. S. Moschytz. Kluwer Academic Publishers, Jan. 2000, ISBN: 0-306-47303-8.
- Dawid, H., Joeressen, O. J., and Meyr, H.:Viterbi Decoder: High Performance Algorithms and Architectures, New York: Marcel Dekker, Inc., Feb. 1999, ISBN: 978-3-64212-330-6.
– Chapter 16 in Digital Signal Processing for Multimedia Systems, K.Parhi, T. Nishitan –. - Dawid, H. and Meyr, H.:CORDIC Algorithms and Architectures, Feb. 1999.
– Chapter 22 in it Digital Signal Processing for Multimedia Systems, K.Parhi, T. Nishitan –. - Mandic, D., Baltersee, J., and Chambers, J.:Non-Linear Adaptive Prediction of Speech with a Pipelined Recurrent Neural Network and Advanced Learning Algorithms, Birkhauser Boston, Feb. 1998, ISBN: 0-817-64042-8.
- Digital Communication Receivers: Synchronization, Channel Estimation and Signal Processing, New York, NY, USA: John Wiley & Sons, 1997, ISBN: 0-471-50275-8.
– <a href="http://onlinelibrary.wiley.com/book/10.1002/0471200573">Digital Communication Receivers: Synchronization, Channel Estimation and Signal Processing</a>: <a href="http://www.wiley.com/buy/9780471502753">Buy this book</a> –. - Digital Communication Receivers: Synchronization, Channel Estimation and Signal Processing, New York, NY, USA: John Wiley & Sons, 1997, ISBN: 0-471-50275-8.
– <a href="http://www.wiley.com/buy/9780471502753">Buy this book</a> –. - Retargetable Code Generation for Digital Signal Processors, Dordrecht, NL: Kluwer Academic Publishers, June 1997, ISBN: 0-792-39958-7.
- Gilge, M., Engelhardt, T., and Mehlan, R.:Coding of Arbitrarily Shaped Image Segments Based on a Generalized Orthogonal Transform, 1992.
– in Digital Image Processing, Rama Chellappa –. - Meyr, H. and Ascheid, G.:Synchronization in Digital Communications, New York, NY, USA: John Wiley & Sons, vol. 1.
1990, ISBN: 978-0-47150-193-0. - Oerder, M.:Algorithmen zur digitalen Taktsynchronisation bei Datenübertragung, no. 119 in VDI-Fortschritt-Berichte, Düsseldorf: VDI-Verlag, vol. 10 of VDI-Fortschritt-Berichte.
1989, ISBN: 3-181-41910-9.
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