Dartmann, G. (Ed.), Song, H. (Ed.) and Schmeink, A. (Ed.): Big Data Analytics for Cyber-Physical Systems, Elsevier, Jul. 2019, accepted for publication, ISBN: 978-0-12816-637-6

Schürmans, S. and Leupers, R.: Power Estimation on Electronic System Level using Linear Power Models, Springer International Publishing, 1 ed., Feb. 2019, ISBN: 978-3-03001-875-7, 10.1007/978-3-030-01875-7

Bhattacharyya, S., Deprettere, E., Leupers, R. and Takala, J.: Handbook of Signal Processing Systems, Springer, 3rd ed., Oct. 2018, ISBN: 978-1-44196-344-4, 10.1007/978-3-319-91734-4

Castrillon, J. and Leupers, R.: Programming Heterogeneous MPSoCs: Tool Flows to Close the Software Productivity , Springer International Publishing, Oct. 2013, ISBN: 978-3-31900-674-1, 10.1007/978-3-319-00675-8

Karuri, K. and Leupers, R.: Application Analysis Tools for ASIP Design, Springer, Jun. 2011, ISBN: 978-1-44198-254-4, 10.1007/978-1-4419-8255-1

Kempf, T., Ascheid, G. and Leupers, R.: Multiprocessor Systems on Chip: Design Space Exploration, Springer, Feb. 2011, ISBN: 978-1-44198-152-3, 10.1007/978-1-4419-8153-0

Leupers, R. and Temam, O.: Processor and System-on-Chip Simulation, Springer, Sep. 2010, ISBN: 978-1-44196-174-7, 10.1007/978-1-4419-6175-4

Hohenauer, M. and Leupers, R.: C Compilers for ASIPs: Automatic Compiler Generation with LISA, Springer, Dec. 2009, ISBN: 978-1-44191-175-9, 10.1007/978-1-4419-1176-6

Chattopadhyay, A., Leupers, R., Meyr, H. and Ascheid, G.: Language-driven Exploration and Implementation of Partially Re-configurable ASIPs, Springer, Dec. 2008, ISBN: 978-1-40209-296-1

Wieferink, A., Meyr, H. and Leupers, R.: Retargetable Processor System Integration into Multi-Processor System-on-Chip Platforms, Springer, Jul. 2008, ISBN: 1-402-08574-5, 10.1007/978-1-4020-8652-6

Schliebusch, O., Meyr, H. and Leupers, R.: Optimized ASIP Synthesis from Architecture Description Language Models, Springer, Mar. 2007, ISBN: 1-402-05685-0, 10.1007/978-1-4020-5686-4

Ienne, P. and Leupers, R.: Customizable Embedded Processors: Design Technologies and Applications, Morgan Kaufmann, Jul. 2006, ISBN: 0-123-69526-0, 10.1016/B978-0-12-369526-0.X5000-1

Kogel, T., Leupers, R. and Meyr, H.: Integrated System-Level Modeling of Network-on-Chip Enabled Multi-Processor Platforms, Springer, Jun. 2006, ISBN: 1-402-04825-4, 10.1007/1-4020-4826-2

Hoffmann, A., Meyr, H. and Leupers, R.: Architecture Exploration for Embedded Processors with LISA, Kluwer Academic Press, Dec. 2002, ISBN: 1-402-07338-0, 10.1007/978-1-4757-4538-2

Leupers, R.: Retargetable Compiler Technology for Embedded Systems - Tools and Applications, Kluwer Academic Publishers, Nov. 2001, ISBN: 0-792-37578-5, 10.1007/978-1-4757-6420-8

Leupers, R.: Code Optimization Techniques for Embedded Processors - Methods, Algorithms, and Tools, Kluwer Academic Publishers, Nov. 2000, ISBN: 0-792-37989-6, 10.1007/978-1-4757-3169-9

Leupers, R.: Retargetable Code Generation for Digital Signal Processors, Kluwer Academic Publishers, Jun. 1997, ISBN: 0-792-39958-7, 10.1007/978-1-4757-2570-4

Meyr, H.: Digital Communication Receivers: Synchronization, Channel Estimation and Signal Processing, John Wiley & Sons, 1997, ISBN: 0-471-50275-8, 10.1002/0471200573

Meyr, H. and Ascheid, G.: Synchronization in Digital Communications, John Wiley & Sons, 1990, ISBN: 978-0-47150-193-0

Oerder, M.: Algorithmen zur digitalen Taktsynchronisation bei Datenübertragung, , No. 119, VDI-Verlag, 1989, ISBN: 3-181-41910-9