News
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New Book Publication: Handbook of Signal Processing Systems
Bhattacharyya, S.S.; Deprettere, E.F.; Leupers, R.; Takala, J. (Eds.), 1st Edition., 2010, XXXVIII, 1117 p. 200 illus., 100 in color., Hardcover ISBN: 978-1-4419-6344-4
This handbook is essential for those involved in R&D in the design, architecture, and implementation of a wide array of signal processing systems. This handbook is also suitable as a first point of entry to the field...
ISS/SSS visit at Imperial College
ISS/SSS visit the Department of Computing at the Imperial College
On May 26, 2010 ISS/SSS visited The Department of Computing at Imperial College London for a joint seminarin the context of the HiPEAC project. The discussion topics included reconfigurable computing, ASIP design, fast SoC simulators, and multi-core programming for data streaming applications.
SSS is partner of the European FP7 Project EURETILE (EUropean REference TIled architecture Experiment), which has the goal to investigate and implement a brain-inspired massively parallel tiled computer architecture. The focus of SSS in EURETILE is the development of an efficient MPSoC simulation environment, which will be suitable for application development, software debugging and...
Best Paper Award auf der SoC'09
The paper "A Checkpoint/Restore Framework for SystemC-Based Virtual Platforms"
(ISS/SSS in cooperation with CoWare) has been honoured with a Best Paper Award at SoC'09 in Tampere.
Best Paper Award auf der DATE'09
The paper "Retargetable Code Optimization for Predicated Execution"
(ISS/SSS in cooperation with ACE and NXP) has been honoured with a Best Paper Award at DATE 2009 in Nice
ISS participates actively in the European "NEWCOM++" (Network of Excellence in Wireless COMmunications) project, which has the goal to intensify collaboration between the leading European research institutions in the domain of wireless communications and to significantly advance European research in this area.
ArtistDesign (Network of Excellence on Embedded Systems Design)
SSS is a member of ArtistDesign, whose major objective is to promote european research in the field of embedded system design and to push the developement of this new multidisciplinary field.
HiPEAC2 (European Network of Excellence on High-Performance Embedded Architecture and Compilation
SSS participates actively in HiPEAC2, which addresses the design and implementation of high-performance commodity computing devices. The objectives of HiPEAC2 are to ensure the visibility of European institutions in the high performance embedded market, and to promote the integration of research efforts in a common direction. Press release
Decisions in the excellence initiative program of the German government:
Great success for RWTH Aachen University
Three research cluster proposals of RWTH Aachen University will be funded under the excellence initiative. ISS has a leading role in the cluster "Ultra high-speed Mobile Information and Communication (UMIC)" (Coordinator: Prof. Ascheid). Further information under www.umic.rwth-aachen.de.