Institute for Communication Technologies and Embedded Systems

ICE at Design, Automation and Test in Europe Conference '13

At Design, Automation and Test in Europe Conference (DATE'13), which takes place in Grenoble, France from March 18th till March 22nd, ICE will present three papers and run the HiPEAC booth.

The HiPEAC booth will provide information about the HiPEAC Network of Excellence. As an example of research carried out by HiPEAC members, there will be a demo about ESL Power Estimation. It presents the methodology developed in the "High-Level Power Estimation for Communication Architectures of MPSoCs" project. It facilitates creation of ESL power models from just a power trace recorded at a lower level.

The papers presented by ICE are "Accurate and Efficient Reliability Estimation Techniques during ADL-Driven Embedded Processor Design" by Zheng Wang et al., "High-Level Modeling and Synthesis for Embedded FPGAs" by Xiaolin Chen et al. and "Hot-Swapping Architecture with Back-biased Testing for Mitigation of Permanent Faults in Functional Unit Array" by Zoltán Rákossy et al. (in collaboration with Kyoto University Japan, Sato-lab).

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