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Summer Intern from the Indian Statistical Institute (ISI), Kolkata, India

From 15th June to 15th August, a summer intern from Indian Statistical Institute (ISI), Kolkata, India will visit the MPSoC Research Group in ICE. The intern, Mr. Sourav Sengupta, is from the ISI, Kolkata, with which MPSoC Research Group had recently began research collaboration.

Mr. Sengupta is currently pursuing PhD degree on Applied Cryptography. His research interests include…

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Interns from the IIT Kharagpur/Madras, India

From May until late July, three new interns, Mr. Pal, Mr. Sankararaman and Mr. Shyamkumar Jayaraman, are visiting the Chair for Software for Systems on Silicon and the Chair for Integrated Signal Processing Systems. The interns  come from the India Institute of Technology (IIT) - Kharagpur and Madras, universities with which ICE has had several academic exchanges in the past.

Mr.…

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Special session on Virtual Manycore Platforms at DATE 2011, March 16, Grenoble

Organisers:
R Leupers, RWTH Aachen
G Martin, Tensilica

Moderator:
F Ghenassia, STMicroelectronics

The evolution to manycore platforms is real, both in the High-Performance Computing domain and in embedded systems. If we start with ten or more cores, we can see the evolution to many tens of cores and to platforms with 100 or more occurring in the next few years. These platforms are…

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Interns form SOAR Lab. Seoul, Korea

From January until late March 2011, two new interns are visiting the
Chair for Software for Systems on Silicon (SSS). The interns, Mr.
Hyungon Moon and Mr. Seungjun Yang, come from the Software Optimizing
and Research (SOAR) Lab in Seoul Korea, headed by Professor Yunheung
Paek. This exchange has been facilitated by the RWTH Research Fellowship
Program for Korean Graduate Students.

M…

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New Book Publication: Handbook of Signal Processing Systems

Bhattacharyya, S.S.; Deprettere, E.F.; Leupers, R.; Takala, J. (Eds.), 1st Edition., 2010, XXXVIII, 1117 p. 200 illus., 100 in color., Hardcover ISBN: 978-1-4419-6344-4
This handbook is essential for those involved in R&D in the design, architecture, and implementation of a wide array of signal processing systems. This handbook is also suitable as a first point of entry to the field…

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ISS/SSS visit at Imperial College

ISS/SSS visit the Department of Computing at the Imperial College

On May 26, 2010ISS/SSS visited The Department of Computing at Imperial College London for a joint seminarin the context of the HiPEAC project. The discussion topics included reconfigurable computing, ASIP design, fast SoC simulators, and multi-core programming for data streaming applications.

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EURETILE

SSS is partner of the European FP7 Project EURETILE (EUropean REference TIled architecture Experiment), which has the goal to investigate and implement a brain-inspired massively parallel tiled computer architecture. The focus of SSS in EURETILE is the development of an efficient MPSoC simulation environment, which will be suitable for application development, software debugging and…

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Best Paper Award auf der SoC'09

The paper "A Checkpoint/Restore Framework for SystemC-Based Virtual Platforms"

(ISS/SSS in cooperation with CoWare) has been honoured with a Best Paper Award at SoC'09 in Tampere.

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DATE 09

Best Paper Award auf der DATE'09

The paper "Retargetable Code Optimization for Predicated Execution"
(ISS/SSS in cooperation with ACE and NXP) has been honoured with a Best Paper Award at DATE 2009 in Nice

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NEWCOM++

ISS participates actively in the European "NEWCOM++" (Network of Excellence in Wireless COMmunications) project, which has the goal to intensify collaboration between the leading European research institutions in the domain of wireless communications and to significantly advance European research in this area.

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