- Merchant, F., Chattopadhyay, A., Garga, G., Nandy, S. . K., and Narajan, R.:Efficient QR Decomposition Using Low Complexity Column-wise Givens Rotation (CGR) , in 27th International Conference on VLSI Design, IIT Bombay, Mumbai India January 7-9 pp. 258–263 , 2014, 10.1109/VLSID.2014.51, ©2014 IEEE.
- A Flexible ASIP Architecture for Connected Components Labeling in Embedded Vision Applications, in Proceedings of the Conference on Design, Automation & Test in Europe (DATE) Mar. 2014, ©2014 IEEE.
- Time-Decoupled Parallel SystemC Simulation, in Proceedings of the Conference on Design, Automation & Test in Europe (DATE) European Design and Automation Association, 2014, 10.7873/DATE.2014.204, ©2014 IEEE.
- Analysis of the Local Quasi-Stationarity of Measured Dual-Polarized MIMO Channels, IEEE Trans. Veh. Technol., 2014, 10.1109/TVT.2014.2358942, ©2014 IEEE.
- Flexible, Efficient Multi-Mode MIMO Detection using reconfigurable ASIP, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2014, 10.1109/TVLSI.2014.2361206, ©2014 IEEE.
- Designing Stream Ciphers with Scalable Data-widths: A Case Study with HC-128, Springer Journal of Cryptographic Engineering, vol. 4, no. 2, pp. 135–143, 2014, 10.1007/s13389-014-0071-0.
- Optimized Channel Estimation for OFDMA Uplink with Frequency-Dependent I/Q Imbalance, in Proceedings of IEEE Vehicular Technology Conference (VTC-Spring) 2014, 10.1109/VTCSpring.2014.7023031, ©2014 IEEE.
- Krishna, M. and Chattopadhyay, A.:Efficient Reversible Logic Synthesis via Isomorphic Subgraph Matching, in Proceedings of IEEE ISMVL 2014, Bremen; 19-21 May 2014 pp. 103–108 , IEEE, 2014, 10.1109/ISMVL.2014.26, ©2014 IEEE.
- Joint Pre/Post-processing Design for Large Millimeter Wave Hybrid Spatial Processing Systems, in Proceedings of European Wireless Conference (EW) pp. 1–6, VDE , 2014, ISBN: 978-3-80073-621-8, ©2014 IEEE.
- One Word/Cycle HC-128 Accelerator via State-Splitting Optimization, in Progress in Cryptology – INDOCRYPT 2014 : 15th International Conference on Cryptology in India, New Delhi, India, December 14-17 Springer, 2014, ISBN: 978-3-31913-039-2.
- Swasdio, W., Pirak, C., Jitapunkul, S., and Ascheid, G.:Alamouti-coded decode-and-forward protocol with optimum relay selection and power allocation for cooperative communications, in EURASIP journal on wireless communications and networking : EURASIP JWCN. p. 13, Springer, 2014, 10.1186/1687-1499-2014-112.
- System-Level Analysis of MPSoCs with a Hardware Scheduler, in Advancing Embedded Systems and Real-Time Communications with Emerging Technologies (Virtanen, S., ed.) Hershey, PA, USA: IGI Global, 1st ed., 2014.
- Force-Directed Scheduling for Data Flow Graph Mapping on Coarse-Grained Reconfigurable Architectures, in International Conference on ReConFigurable Computing and FPGAs (ReConFig) (Cancún, México), IEEE, Dec. 2014, 10.1109/ReConFig.2014.7032519, ©2014 IEEE.
- A Heuristic for Logical Data Buffer Allocation in Multicore Platforms, in International Performance Computing and Communications Conference, Poster Session Dec. 2014, 10.1109/PCCC.2014.7017040, ©2014 IEEE.
- Schumacher, C., Weinstock, J. H., Leupers, R., Ascheid, G., Tosoratto, L., Lonardo, A., Petras, D., and Hoffmann, A.:legaSCi: Legacy SystemC Model Integration into Parallel Simulators, ACM Transactions on Embedded Computing Systems (TECS), vol. 13, pp. 165:1–165:24, Dec. 2014, 10.1145/2678018.
- A Modified Levenberg-Marquardt Method for the Bidirectional Relay Channel, IEEE Transactions on Vehicular Technology, pp. 4096–4101 , Oct. 2014, 10.1109/TVT.2014.2306204, ©2014 IEEE.
- Scalable and Energy-Efficient Reconfigurable Accelerator for Column-Wise Givens Rotation, in 22nd IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) (Playa-del-Carmen, Mexico), IEEE, Oct. 2014, 10.1109/VLSI-SoC.2014.7004166, ©2014 IEEE.
- VLSI Design of a Parallel MCMC-based MIMO Detector with Multiplier-Free Gibbs Samplers, in Proceedings of the 2014 IFIP/IEEE 22nd International Conference on Very Large Scale Integration (VLSI-SoC) pp. 1–6, IEEE, Oct. 2014, 10.1109/VLSI-SoC.2014.7004160, ©2014 IEEE.
- Energy-efficiency of floating-point and fixed-point SIMD cores for MIMO processing systems, in Proceedings of the International Symposium on System-on-Chip (SoC) (Tampere), pp. 1–7, IEEE, Oct. 2014, 10.1109/ISSOC.2014.6972429, ©2014 IEEE.
- Filter Optimization Aided Interference Management with Improved Secrecy, in Proceedings of IEEE Vehicular Technology Conference (VTC-Fall) pp. 1–6, Sept. 2014, 10.1109/VTCFall.2014.6965987, ©2014 IEEE.
- Widely Linear Receivers for SMT Systems with TX/RX Frequency-Selective I/Q Imbalance, in Proceedings of IEEE International Symposium on Personal, Indoor, and Mobile Radio Communications (PIMRC) (Washington D.C., USA), Sept. 2014, 10.1109/PIMRC.2014.7136274, ©2014 IEEE.
- Improving Performance and Productivity for Software Development on TI Multicore DSP Platforms, in Proceedings of the 6th European Embedded Design in Education and Research Conference (EDERC) pp. 31–35, Sept. 2014, 10.1109/EDERC.2014.6924353, ©2014 IEEE.
– Best Presentation Award –.
- Schor, L., Bacivarov, I., Murillo, L. G., Paolucci, P. S., Rousseau, F., El Antably, A., Buecs, R., Fournel, N., Leupers, R., Rai, D., Thiele, L., Tosoratto, L., Vicini, P., and Weinstock, J. H.:EURETILE Design Flow: Dynamic and Fault Tolerant Mapping of Multiple Applications onto Many-Tile Systems, in IEEE International Symposium on Parallel and Distributed Processing with Applications (ISPA) (Milan, Italy), Aug. 2014, 10.1109/ISPA.2014.32, ©2014 IEEE.
- Processor Design with Asymmetric Reliability, in IEEE Computer Society Annual Symposium on VLSI (ISVLSI) (Tampa, Florida, USA), pp. 565–570 , July 2014, 10.1109/ISVLSI.2014.63, ©2014 IEEE.
- Chattopadhyay, A., Majumder, S., Chandak, C., and Chowdhury, N.:Constructive Reversible Logic Synthesis for Boolean Functions with Special Properties, in 6th Conference on Reversible Computation, Kyoto (Yamashita, S., ed.) vol. 8507 of Lecture Notes in Computer Science, pp. 95–110, Springer International Publishing, July 2014, ISBN: 978-3-31908-493-0, 10.1007/978-3-319-08494-7_8.
- Pre-architectural Performance Estimation for ASIP Design Based on Abstract Processor Models, in SAMOS 2014 (Samos, Greece), July 2014, 10.1109/SAMOS.2014.6893204, ©2014 IEEE.
- A Novel Class of Linear MIMO Detectors With Boosted Communications Performance: Algorithm and VLSI Architecture, in Proceedings of the 2014 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) (Tampa, FL, USA), pp. 41–47, IEEE, July 2014, ISBN: 978-1-47993-763-9, 10.1109/ISVLSI.2014.16, ©2014 IEEE.
- Uplink Power Control with MMSE Receiver in Multi-Cell MU-Massive-MIMO Systems, in Proceedings of IEEE International Conference on Communications (ICC) pp. 5184–5190, June 2014, 10.1109/ICC.2014.6884144, ©2014 IEEE.
- Efficient VLSI Architectures for Matrix Inversion in Soft-Input Soft-Output MMSE MIMO Detectors, in Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS) pp. 1018–1021, June 2014, ISBN: 978-1-47993-431-7, 10.1109/ISCAS.2014.6865311, ©2014 IEEE.
- A Novel Reduced-Complexity Soft-Input Soft-Output MMSE MIMO Detector: Algorithm and Efficient VLSI Architecture, in Proceedings of the 2014 IEEE International Conference on Communications (ICC) pp. 4722–4728, IEEE, June 2014, 10.1109/ICC.2014.6884067, ©2014 IEEE.
- Improving ESL Power Models using Switching Activity Information from Timed Functional Models, in Proceedings of the 17th International Workshop on Software and Compilers for Embedded Systems (New York, NY, USA), ACM, June 2014, ISBN: 978-1-45032-941-5, 10.1145/2609248.2609250.
- Assertion-based Debugging of Concurrency Issues in Many-core Systems across HW/SW Boundaries, in DAC Work-in-Progress Session (WIP) (San Francisco, USA), June 2014.
- Efficient and Scalable CGRA-based Implementation of Column-wise Givens Rotation, in 25th IEEE International Conference on Application-specific Systems, Architectures and Processors (Zuerich, Switzerland), June 2014, 10.1109/ASAP.2014.6868659, ©2014 IEEE.
- FBMC-based air interface for 5G Mobile: Challenges and proposed solutions, in CROWNCOM 2014 - 9th International Conference on Cognitive Radio Oriented Wireless Networks June 2014, ©2014 IEEE.
– invited paper –.
- Channel Correlation Maps for Rate-Adaptive MIMO-OFDMA Systems, in Proceedings of IEEE Vehicular Technology Conference (VTC-Spring) May 2014, 0.1109/VTCSpring.2014.7022858, ©2014 IEEE.
- Beamforming Aided Interference Management with Improved Secrecy for Correlated Channels, in Proceedings of IEEE Vehicular Technology Conference (VTC-Spring) May 2014, 10.1109/VTCSpring.2014.7022844, ©2014 IEEE.
- System-level Reliability Exploration Framework for Heterogeneous MPSoC, in ACM Great Lakes Symposium on VLSI (GLSVLSI) (Houston, USA), pp. 9–14, ACM, May 2014, ISBN: 978-1-45032-816-6, 10.1145/2591513.2591519, ©2014 IEEE.
- VLSI Implementation of Linear MIMO Detection With Boosted Communications Performance: Extended Abstract, in Proceedings of the 24th edition of the great lakes symposium on VLSI (New York, NY, USA), pp. 71–72, ACM , May 2014, ISBN: 978-1-45032-816-6, 10.1145/2591513.2591551.
- CoEx: A Novel Profiling-Based Algorithm/Architecture Co-Exploration for ASIP Design, ACM Transactions on Reconfigurable Technology and Systems, May 2014, 10.1109/ReCoSoC.2013.6581520.
- Multiuser Pilot Pattern for Uplink Multicarrier Systems With Frequency-Dependent I/Q Imbalance, in Proceedings of IEEE Wireless Communications and Networking Conference (WCNC) (Istanbul, Turkey), pp. 936–941, IEEE, Apr. 2014, 10.1109/WCNC.2014.6952234, ©2014 IEEE.
- Optimized Buffer Allocation in Multicore Platforms, in Proceedings of the Conference on Design, Automation & Test in Europe (DATE) Mar. 2014, ©2014 IEEE.
- Automatic Detection of Concurrency Bugs through Event Ordering Constraints, in Proceedings of the Conference on Design, Automation & Test in Europe (DATE) (Dresden, Germany), Mar. 2014, ©2014 IEEE.
- Beamforming Aided Interference Management for Improved Secrecy in Multicell Environments, in European Wireless 2014, 14-16 May 2014,Barcelona, Spain pp. 1–6, VDE, Mar. 2014, ISBN: 978-3-80073-621-8.
- Donati, M., Saponara, S., Fanucci, L., Errico, W., Colonna, A., Tuccioc,, G., Odendahl, M., Leupers, R., Spada, A., Pii, V., Cordiviola, E., Nuzzolo, F., and Reiter, F.:A New Space Digital Signal Processor Design, Lecture Notes on Electronic Engineering, Feb. 2014.
- Outage-Constrained Power Allocation in Spectrum Sharing Systems with Partial CSI, IEEE Transactions on Communications, vol. 62, pp. 452–466, Feb. 2014, 10.1109/TCOMM.2013.122113.120974, ©2014 IEEE.
- A compiler infrastructure for embedded heterogeneous MPSoCs, in Parallel Computing vol. 40, no. 2, pp. 51–68, Elsevier, Feb. 2014, http://dx.doi.org/10.1016/j.parco.2013.11.007.
News >> News >> News
The award ceremony is on June 20, 2017
Area: Application Specific Computing Systems and Hardware Architectures
We are glad to announce that the EC will grant the H2020 Innovation Action TETRAMAX with