- Stahl, J. and Meyr, H.:Architekturen für Viterbidekoder, GMD-Studie 126: III. E.I.S-Workshop, Bonn, 1987.
- Derivation of Gardner's Timing Error Detector from the Maximum Likelihood Principle, IEEE Transactions on Communications, vol. COM-35, pp. 684–685, June 1987.
- Stahl, J. and Meyr, H.:A bit serial Viterbi decoder chip for the MBit/s range, in IEEE Custom Integrated Circuits Conf. CICC 1987, Portland, OR pp. 551–554, May 1987.
- Rotationally Invariant Trellis Codes for MPSK modulation, Archiv für Elektronik und übertragungstechnik (AEü), vol. 41, pp. 28–32, Feb. 1987.
- Meyr, H. and Ryter, D.:Multistable systems with moderate noise: Coarse-graining to a Markovian jump process and evaluation of the transition rates, Physica, vol. 142A, pp. 112–134, 1987.
– North-Holland, Amsterdam –.
- Keller, H., Meyr, H., and Müller, H.:Transmission Design Criteria for a Synchronous Token Ring, in Advances in Local Area Networks IEEE Press, The Institute of Electrical and Electronics Engineers, Inc., New York, 1987.
- Häb, R. and Meyr, H.:Optimal Carrier Recovery and Detection on Frequency-Nonselective Fading Channels, in Proceedings of Symposium of Inf. Theory & Appl. (SITA '87) 1987.
– Tokyo, Japan –.
- Digital Filter and Square Timing Recovery, in Conf. Record, IEEE Global Communications Conference, GLOBECOM 1987, Tokyo pp. 1345–1349, 1987.
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The award ceremony is on June 20, 2017
Area: Application Specific Computing Systems and Hardware Architectures
We are glad to announce that the EC will grant the H2020 Innovation Action TETRAMAX with